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Searched refs:XPS_SYS_CTRL_BASEADDR (Results 1 – 4 of 4) sorted by relevance

/bsp/zynqmp-r5-axu4ev/drivers/Zynq_HAL_Driver/xemacpsif/
A Dxemacpsif_physpeed.c154 #define SLCR_LOCK_ADDR (XPS_SYS_CTRL_BASEADDR + 0x4)
155 #define SLCR_UNLOCK_ADDR (XPS_SYS_CTRL_BASEADDR + 0x8)
156 #define SLCR_GEM0_CLK_CTRL_ADDR (XPS_SYS_CTRL_BASEADDR + 0x140)
157 #define SLCR_GEM1_CLK_CTRL_ADDR (XPS_SYS_CTRL_BASEADDR + 0x144)
161 #define SLCR_ADDR_GEM_RST_CTRL (XPS_SYS_CTRL_BASEADDR + 0x214)
/bsp/zynqmp-r5-axu4ev/drivers/Zynq_HAL_Driver/sdps_v3_9/
A Dxsdps.c164 InstancePtr->SlcrBaseAddr = XPS_SYS_CTRL_BASEADDR; in XSdPs_CfgInitialize()
A Dxsdps_hw.h1094 #define XPS_SYS_CTRL_BASEADDR 0xFF180000U macro
/bsp/zynqmp-r5-axu4ev/drivers/Zynq_HAL_Driver/
A Dxparameters_ps.h157 #define XPS_SYS_CTRL_BASEADDR 0xFF180000U macro

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