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Searched refs:XUARTPS_CR_OFFSET (Results 1 – 2 of 2) sorted by relevance

/bsp/zynqmp-a53-dfzu2eg/drivers/
A Ddrv_uart.c140 temp_reg = (((readl(base + XUARTPS_CR_OFFSET)) & ((rt_uint32_t)(~XUARTPS_CR_EN_DIS_MASK))) | in _uart_baudrate_init()
142 writel(temp_reg, base + XUARTPS_CR_OFFSET); in _uart_baudrate_init()
149 writel(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST, base + XUARTPS_CR_OFFSET); in _uart_baudrate_init()
152 temp_reg = (((readl(base + XUARTPS_CR_OFFSET)) & ((rt_uint32_t)(~XUARTPS_CR_EN_DIS_MASK))) | in _uart_baudrate_init()
154 writel(temp_reg, base + XUARTPS_CR_OFFSET); in _uart_baudrate_init()
/bsp/zynqmp-a53-dfzu2eg/drivers/zynqmp/
A Dzynqmp_uart.h32 #define XUARTPS_CR_OFFSET 0x0000U /**< Control Register [8:0] */ macro

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