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/bsp/apm32/libraries/APM32F10x_Library/Device/Geehy/APM32F10x/Include/
A Dapm32f10x.h348 #ifndef __IM
349 #define __IM __I macro
1416 __IM uint32_t PSCH;
1428 __IM uint32_t PSCL;
3921 __IM uint32_t STS;
4308 __IM uint32_t STS;
5108 __IM uint32_t RIS;
5157 __IM uint32_t MIC;
5168 __IM uint32_t ICF;
5426 __IM uint32_t RIS;
[all …]
/bsp/apm32/libraries/APM32F4xx_Library/Device/Geehy/APM32F4xx/Include/
A Dapm32f4xx.h320 #ifndef __IM
321 #define __IM __I macro
3887 __IM uint32_t STS;
4272 __IM uint32_t STS;
5345 __IM uint32_t STS;
6467 __IM uint32_t STS;
6824 __IM uint32_t REV;
6979 __IM uint32_t RX;
6990 __IM uint32_t RY;
7018 __IM uint32_t REV;
[all …]
/bsp/apm32/libraries/APM32E10x_Library/Device/Geehy/APM32E10x/Include/
A Dapm32e10x.h228 #ifndef __IM
229 #define __IM __I macro
1225 __IM uint32_t PSCH;
1237 __IM uint32_t PSCL;
3730 __IM uint32_t STS;
4018 __IM uint32_t RES1;
4029 __IM uint32_t RES2;
4117 __IM uint32_t STS;
5140 __IM uint32_t RIS;
5262 __IM uint32_t AIC;
[all …]
/bsp/apm32/libraries/APM32S10x_Library/Device/Geehy/APM32S10x/Include/
A Dapm32s10x.h221 #ifndef __IM
222 #define __IM __I macro
561 __IM uint32_t IDATA;
1186 __IM uint32_t PSCH;
1198 __IM uint32_t PSCL;
2442 __IM uint32_t RXMID;
3691 __IM uint32_t STS;
4016 __IM uint32_t ISTS;
4032 __IM uint32_t RIS;
4081 __IM uint32_t MIC;
[all …]
/bsp/apm32/libraries/APM32F0xx_Library/Device/Geehy/APM32F0xx/Include/
A Dapm32f0xx.h358 #ifndef __IM
359 #define __IM __I macro
545 __IM uint32_t DATA;
644 __IM uint32_t RXMID;
673 __IM uint32_t RXMDL;
687 __IM uint32_t RXMDH;
1254 __IM uint32_t RESERVED;
2580 __IM uint32_t OBCS;
3094 __IM uint32_t PEC;
3174 __IM uint32_t STS;
[all …]
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G074.h85 #define __IM __I macro
315 __IM uint32_t RESERVED;
1023 __IM uint32_t RESERVED2;
1339 __IM uint8_t RESERVED;
1340 __IM uint16_t RESERVED1;
1757 __IM uint32_t RESERVED;
3292 __IM uint32_t RESERVED;
3650 __IM uint8_t RESERVED;
3847 __IM uint8_t RESERVED;
8148 __IM uint8_t RESERVED;
[all …]
A DR9A07G075.h85 #define __IM __I macro
315 __IM uint32_t RESERVED;
1023 __IM uint32_t RESERVED2;
1357 __IM uint8_t RESERVED;
1358 __IM uint16_t RESERVED1;
1775 __IM uint32_t RESERVED;
3191 __IM uint32_t RESERVED;
3549 __IM uint8_t RESERVED;
3746 __IM uint8_t RESERVED;
4918 __IM uint16_t RESERVED;
[all …]
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G084.h85 #define __IM __I macro
315 __IM uint32_t RESERVED;
1025 __IM uint32_t RESERVED2;
1358 __IM uint8_t RESERVED;
1359 __IM uint16_t RESERVED1;
1776 __IM uint32_t RESERVED;
3190 __IM uint32_t RESERVED;
3548 __IM uint8_t RESERVED;
3745 __IM uint8_t RESERVED;
4917 __IM uint16_t RESERVED;
[all …]
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G084.h85 #define __IM __I macro
315 __IM uint32_t RESERVED;
1025 __IM uint32_t RESERVED2;
1358 __IM uint8_t RESERVED;
1359 __IM uint16_t RESERVED1;
1776 __IM uint32_t RESERVED;
3190 __IM uint32_t RESERVED;
3548 __IM uint8_t RESERVED;
3745 __IM uint8_t RESERVED;
4917 __IM uint16_t RESERVED;
[all …]
/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/
A Dyc3122.h130 #define __IM __I macro
316 __IM uint32_t RESERVED[5];
428 __IM uint32_t RESERVED;
458 __IM uint16_t RESERVED1;
732 __IM uint32_t RESERVED;
775 __IM uint32_t RESERVED1;
826 __IM uint32_t RESERVED3;
912 __IM uint32_t RESERVED4;
998 __IM uint32_t RESERVED5;
1452 __IM uint32_t RESERVED;
[all …]
/bsp/renesas/ra8d1-vision-board/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA8D1BH.h71 #define __IM __I macro
120 __IM uint16_t RESERVED;
180 __IM uint32_t RESERVED1;
188 __IM uint16_t RESERVED;
262 __IM uint8_t RESERVED;
275 __IM uint8_t RESERVED2;
276 __IM uint16_t RESERVED3;
300 __IM uint8_t RESERVED4;
313 __IM uint8_t RESERVED6;
432 __IM uint8_t RESERVED;
[all …]
/bsp/renesas/ra8d1-ek/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA8D1BH.h71 #define __IM __I macro
120 __IM uint16_t RESERVED;
180 __IM uint32_t RESERVED1;
188 __IM uint16_t RESERVED;
262 __IM uint8_t RESERVED;
275 __IM uint8_t RESERVED2;
276 __IM uint16_t RESERVED3;
300 __IM uint8_t RESERVED4;
313 __IM uint8_t RESERVED6;
432 __IM uint8_t RESERVED;
[all …]
/bsp/renesas/ra8m1-ek/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA8M1AH.h71 #define __IM __I macro
120 __IM uint16_t RESERVED;
180 __IM uint32_t RESERVED1;
188 __IM uint16_t RESERVED;
262 __IM uint8_t RESERVED;
275 __IM uint8_t RESERVED2;
276 __IM uint16_t RESERVED3;
300 __IM uint8_t RESERVED4;
313 __IM uint8_t RESERVED6;
432 __IM uint8_t RESERVED;
[all …]
/bsp/renesas/ebf_qi_min_6m5/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA6M5BH.h71 #define __IM __I macro
120 __IM uint16_t RESERVED;
182 __IM uint32_t RESERVED1;
190 __IM uint16_t RESERVED;
264 __IM uint8_t RESERVED;
277 __IM uint8_t RESERVED2;
278 __IM uint16_t RESERVED3;
422 __IM uint8_t RESERVED;
442 __IM uint16_t RESERVED;
461 __IM uint16_t RESERVED;
[all …]
/bsp/renesas/ra2l1-cpk/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h105 #define __IM __I macro
154 __IM uint16_t RESERVED;
216 __IM uint32_t RESERVED1;
224 __IM uint16_t RESERVED;
298 __IM uint8_t RESERVED;
311 __IM uint8_t RESERVED2;
312 __IM uint16_t RESERVED3;
336 __IM uint8_t RESERVED4;
456 __IM uint8_t RESERVED;
476 __IM uint16_t RESERVED;
[all …]
/bsp/renesas/ra6m4-cpk/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h105 #define __IM __I macro
154 __IM uint16_t RESERVED;
216 __IM uint32_t RESERVED1;
224 __IM uint16_t RESERVED;
298 __IM uint8_t RESERVED;
311 __IM uint8_t RESERVED2;
312 __IM uint16_t RESERVED3;
336 __IM uint8_t RESERVED4;
456 __IM uint8_t RESERVED;
476 __IM uint16_t RESERVED;
[all …]
/bsp/renesas/ra6m4-iot/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h105 #define __IM __I macro
154 __IM uint16_t RESERVED;
216 __IM uint32_t RESERVED1;
224 __IM uint16_t RESERVED;
298 __IM uint8_t RESERVED;
311 __IM uint8_t RESERVED2;
312 __IM uint16_t RESERVED3;
336 __IM uint8_t RESERVED4;
456 __IM uint8_t RESERVED;
476 __IM uint16_t RESERVED;
[all …]
/bsp/renesas/ra6m3-ek/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h105 #define __IM __I macro
154 __IM uint16_t RESERVED;
216 __IM uint32_t RESERVED1;
224 __IM uint16_t RESERVED;
298 __IM uint8_t RESERVED;
311 __IM uint8_t RESERVED2;
312 __IM uint16_t RESERVED3;
336 __IM uint8_t RESERVED4;
456 __IM uint8_t RESERVED;
476 __IM uint16_t RESERVED;
[all …]
/bsp/renesas/ra4m2-eco/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA4M2AD.h71 #define __IM __I macro
120 __IM uint16_t RESERVED;
182 __IM uint32_t RESERVED1;
190 __IM uint16_t RESERVED;
264 __IM uint8_t RESERVED;
422 __IM uint8_t RESERVED;
442 __IM uint16_t RESERVED;
461 __IM uint16_t RESERVED;
540 __IM uint8_t RESERVED;
558 __IM uint16_t RESERVED;
[all …]
/bsp/renesas/ra4e2-eco/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA4E2B9.h55 #define __IM __I macro
104 __IM uint16_t RESERVED;
164 __IM uint32_t RESERVED1;
172 __IM uint16_t RESERVED;
246 __IM uint8_t RESERVED;
259 __IM uint8_t RESERVED2;
260 __IM uint16_t RESERVED3;
284 __IM uint8_t RESERVED4;
416 __IM uint8_t RESERVED;
446 __IM uint8_t RESERVED;
[all …]
/bsp/renesas/ra6e2-fpb/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA6E2BB.h55 #define __IM __I macro
104 __IM uint16_t RESERVED;
164 __IM uint32_t RESERVED1;
172 __IM uint16_t RESERVED;
246 __IM uint8_t RESERVED;
259 __IM uint8_t RESERVED2;
260 __IM uint16_t RESERVED3;
284 __IM uint8_t RESERVED4;
416 __IM uint8_t RESERVED;
446 __IM uint8_t RESERVED;
[all …]
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR7FA6M3AH.h64 #define __IM __I macro
113 __IM uint16_t RESERVED;
173 __IM uint32_t RESERVED1;
181 __IM uint16_t RESERVED;
255 __IM uint8_t RESERVED;
268 __IM uint8_t RESERVED2;
269 __IM uint16_t RESERVED3;
293 __IM uint8_t RESERVED4;
425 __IM uint8_t RESERVED;
455 __IM uint8_t RESERVED;
[all …]
/bsp/ck802/libraries/common/usart/
A Ddw_usart.h83 __IM uint32_t RBR; /* Offset: 0x000 (R/ ) Receive buffer register */
92 __IM uint32_t IIR; /* Offset: 0x008 (R/ ) Interrupt indicia register */
97 __IM uint32_t LSR; /* Offset: 0x014 (R/ ) Transmission state register */
98 __IM uint32_t MSR; /* Offset: 0x018 (R/ ) Modem state register */
101 __IM uint32_t TFR; /* Offset: 0x074 (R/ ) transmit FIFO read */
103 __IM uint32_t USR; /* Offset: 0x07c (R/ ) UART state register */
104 __IM uint32_t TFL; /* Offset: 0x080 (R/ ) transmit FIFO level */
105 __IM uint32_t RFL; /* Offset: 0x084 (R/ ) receive FIFO level */
/bsp/ck802/libraries/common/pwm/
A Dck_pwm.h54 __IM uint32_t PWMINTEN2; /* Offset: 0x018 (N/A) interrupt enable */
65 …__IM uint32_t PWM01COUNT; /* Offset: 0x044 (R/ ) contain the current value of the P…
66 …__IM uint32_t PWM23COUNT; /* Offset: 0x048 (R/ ) contain the current value of the P…
79 …__IM uint32_t CAPRIS; /* Offset: 0x07C (R/ ) input capture raw interrupt status…
81 … __IM uint32_t CAPIS; /* Offset: 0x084 (R/ ) input capture interrupt status */
82 __IM uint32_t CAP01T; /* Offset: 0x088 (R/ ) input capture count value */
83 __IM uint32_t CAP23T; /* Offset: 0x08C (R/ ) input capture count value */
89 __IM uint32_t TIMRIS; /* Offset: 0x0A4 (R/ ) time raw interrupt stats */
91 __IM uint32_t TIMIS; /* Offset: 0x0AC (R/ ) time interrupt status */
/bsp/ck802/libraries/common/spi/
A Ddw_spi.h134 __IM uint32_t ISR; /* Offset: 0x030 (R/W) interrupt status register */
135 __IM uint32_t RISR; /* Offset: 0x034 (R/W) Raw Interrupt Status Register */
136 …__IM uint8_t TXOICR; /* Offset: 0x038 (R/W) Transmit FIFO Overflow Interrupt Clear Registe…
138 …__IM uint8_t RXOICR; /* Offset: 0x03C (R/W) Receive FIFO Overflow Interrupt Clear Register…
140 …__IM uint8_t RXUICR; /* Offset: 0x040 (R/W) Receive FIFO Underflow Interrupt Clear Registe…
142 __IM uint8_t MSTICR; /* Offset: 0x044 (R/W) Multi-Master Interrupt Clear Register */
144 __IM uint8_t ICR; /* Offset: 0x048 (R/W) Interrupt Clear Register */
152 __IM uint32_t IDR; /* Offset: 0x058 (R/W) identification register */

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