Searched refs:__NUM__ (Results 1 – 7 of 7) sorted by relevance
| /bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/inc/ |
| A D | n32l43x_tsc.h | 318 #define __TSC_SW_CHN_NUM_CONFIG(__NUM__) MODIFY_REG(TSC->ANA_CTRL, TSC_ANA_CTRL_SW_PAD_MUX_Msk,_… argument
370 #define __TSC_GET_CHN_BASE(__NUM__) ((TSC->THRHD[(__NUM__)] & TSC_THRHDx_BASE_Msk ) >> TSC_THRHDx… argument
376 #define __TSC_GET_CHN_DELTA(__NUM__) ((TSC->THRHD[(__NUM__)] & TSC_THRHDx_DELTA_Msk ) >> TSC_THRHD… argument
382 #define __TSC_GET_CHN_RESIST(__NUM__) ((TSC->RESR[(__NUM__)>>3] >>(((__NUM__) & 0x7UL)*4)) & TSC_R… argument
|
| /bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/inc/ |
| A D | n32l40x_tsc.h | 318 #define __TSC_SW_CHN_NUM_CONFIG(__NUM__) MODIFY_REG(TSC->ANA_CTRL, TSC_ANA_CTRL_SW_PAD_MUX_Msk,_… argument
370 #define __TSC_GET_CHN_BASE(__NUM__) ((TSC->THRHD[(__NUM__)] & TSC_THRHDx_BASE_Msk ) >> TSC_THRHDx… argument
376 #define __TSC_GET_CHN_DELTA(__NUM__) ((TSC->THRHD[(__NUM__)] & TSC_THRHDx_DELTA_Msk ) >> TSC_THRHD… argument
382 #define __TSC_GET_CHN_RESIST(__NUM__) ((TSC->RESR[(__NUM__)>>3] >>(((__NUM__) & 0x7UL)*4)) & TSC_R… argument
|
| /bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/inc/ |
| A D | n32g43x_tsc.h | 318 #define __TSC_SW_CHN_NUM_CONFIG(__NUM__) MODIFY_REG(TSC->ANA_CTRL, TSC_ANA_CTRL_SW_PAD_MUX_Msk,_… argument
370 #define __TSC_GET_CHN_BASE(__NUM__) ((TSC->THRHD[(__NUM__)] & TSC_THRHDx_BASE_Msk ) >> TSC_THRHDx… argument
376 #define __TSC_GET_CHN_DELTA(__NUM__) ((TSC->THRHD[(__NUM__)] & TSC_THRHDx_DELTA_Msk ) >> TSC_THRHD… argument
382 #define __TSC_GET_CHN_RESIST(__NUM__) ((TSC->RESR[(__NUM__)>>3] >>(((__NUM__) & 0x7UL)*4)) & TSC_R… argument
|
| /bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/ |
| A D | n32g45x_tsc.h | 318 #define __TSC_SW_CHN_NUM_CONFIG(__NUM__) MODIFY_REG(TSC->ANA_CTRL, TSC_ANA_CTRL_SW_PAD_MUX_MASK,… argument
370 #define __TSC_GET_CHN_BASE(__NUM__) ((TSC->THRHD[(__NUM__)] & TSC_THRHD_BASE_MASK ) >> TSC_THRHD_… argument
376 #define __TSC_GET_CHN_DELTA(__NUM__) ((TSC->THRHD[(__NUM__)] & TSC_THRHD_DELTA_MASK ) >> TSC_THRHD… argument
382 #define __TSC_GET_CHN_RESIST(__NUM__) ((TSC->RESR[(__NUM__)>>3] >>(((__NUM__) & 0x7UL)*4)) & TSC_R… argument
|
| /bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/inc/ |
| A D | n32wb452_tsc.h | 365 #define __TSC_SW_CHN_NUM_CONFIG(__NUM__) MODIFY_REG(TSC->ANA_CTRL, TSC_ANA_CTRL_SW_PAD_MUX_MASK,… argument
417 #define __TSC_GET_CHN_BASE(__NUM__) ((*((&(TSC->THRHD0))+(__NUM__)) & TSC_THRHD_BASE_MASK ) >> TS… argument
423 #define __TSC_GET_CHN_DELTA(__NUM__) ((*((&(TSC->THRHD0))+(__NUM__)) & TSC_THRHD_DELTA_MASK ) >> T… argument
429 #define __TSC_GET_CHN_RESIST(__NUM__) (((*((&(TSC->RESR0))+((__NUM__)>>3))) >>(((__NUM__) & 0x7UL)… argument
|
| /bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/ |
| A D | n32g4fr_tsc.h | 365 #define __TSC_SW_CHN_NUM_CONFIG(__NUM__) MODIFY_REG(TSC->ANA_CTRL, TSC_ANA_CTRL_SW_PAD_MUX_MASK,… argument
417 #define __TSC_GET_CHN_BASE(__NUM__) ((*((&(TSC->THRHD0))+(__NUM__)) & TSC_THRHD_BASE_MASK ) >> TS… argument
423 #define __TSC_GET_CHN_DELTA(__NUM__) ((*((&(TSC->THRHD0))+(__NUM__)) & TSC_THRHD_DELTA_MASK ) >> T… argument
429 #define __TSC_GET_CHN_RESIST(__NUM__) (((*((&(TSC->RESR0))+((__NUM__)>>3))) >>(((__NUM__) & 0x7UL)… argument
|
| /bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/ |
| A D | n32g45x_tsc.h | 365 #define __TSC_SW_CHN_NUM_CONFIG(__NUM__) MODIFY_REG(TSC->ANA_CTRL, TSC_ANA_CTRL_SW_PAD_MUX_MASK,… argument
417 #define __TSC_GET_CHN_BASE(__NUM__) ((*((&(TSC->THRHD0))+(__NUM__)) & TSC_THRHD_BASE_MASK ) >> TS… argument
423 #define __TSC_GET_CHN_DELTA(__NUM__) ((*((&(TSC->THRHD0))+(__NUM__)) & TSC_THRHD_DELTA_MASK ) >> T… argument
429 #define __TSC_GET_CHN_RESIST(__NUM__) (((*((&(TSC->RESR0))+((__NUM__)>>3))) >>(((__NUM__) & 0x7UL)… argument
|
Completed in 26 milliseconds