| /bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/ |
| A D | fm33lc0xx_fl_atim.c | 82 #define IS_FL_ATIM_CHANNEL(__VALUE__) (((__VALUE__) == FL_ATIM_CHANNEL_1)\ argument
99 #define IS_FL_ATIM_TRIGGER_SRC(__VALUE__) (((__VALUE__) == FL_ATIM_TRGI_ITR0 )\ argument
171 #define IS_FL_ATIM_AUTORELOAB_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ argument
174 #define IS_FL_ATIM_OC_FASTMODE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ argument
177 #define IS_FL_ATIM_OC_PRELOAD(__VALUE__) (((__VALUE__) == FL_ENABLE) \ argument
180 #define IS_FL_ATIM_OC_ETR_CLEARN(__VALUE__) (((__VALUE__) == FL_ENABLE) \ argument
183 #define IS_FL_ATIM_OC_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE)\ argument
186 #define IS_FL_ATIM_OCN_STATE(__VALUE__) (((__VALUE__) == FL_ENABLE)\ argument
218 #define IS_FL_ATIM_OSSR_STATE(__VALUE__) (((__VALUE__) == FL_ATIM_OSSR_DISABLE) \ argument
221 #define IS_FL_ATIM_OSSI_STATE(__VALUE__) (((__VALUE__) == FL_ATIM_OSSI_DISABLE) \ argument
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| A D | fm33lc0xx_fl_adc.c | 43 #define IS_FL_ADC_ADCCLK_SOURCE(__VALUE__) (((__VALUE__) == FL_RCC_ADC_CLK_SOURCE_… argument
49 #define IS_FL_ADC_ADCCLK_PRESCALER(__VALUE__) (((__VALUE__) == FL_RCC_ADC_PSC_DIV1)||\ argument
57 #define IS_FL_ADC_CONTINUOUSCONVMODE(__VALUE__) (((__VALUE__) == FL_ADC_CONV_MODE_SINGL… argument
60 #define IS_FL_ADC_AUTO_MODE(__VALUE__) (((__VALUE__) == FL_ADC_SINGLE_CONV_MOD… argument
64 #define IS_FL_ADC_SCANDIRECTION(__VALUE__) (((__VALUE__) == FL_ADC_SEQ_SCAN_DIR_FO… argument
68 #define IS_FL_ADC_EXTERNALTRIGCONV(__VALUE__) (((__VALUE__) == FL_ADC_TRIGGER_EDGE_NO… argument
73 #define IS_FL_ADC_EXTERNALTRIGSOURCE(__VALUE__) (((__VALUE__) == FL_ADC_TRGI_PA8)||\ argument
83 #define IS_FL_ADC_CHANNEL_FAST_TIME(__VALUE__) (((__VALUE__) == FL_ADC_FAST_CH_SAMPLIN… argument
113 #define IS_FL_ADC_OVERSAMPCOFIG(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
116 #define IS_FL_ADC_OVERSAMPINGRATIO(__VALUE__) (((__VALUE__) == FL_ADC_OVERSAMPLING_MU… argument
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| A D | fm33lc0xx_fl_gptim.c | 46 #define IS_FL_GPTIM_COUNTERMODE(__VALUE__) (((__VALUE__) == FL_GPTIM_COUNTER_DIR_UP) || \ argument
63 #define IS_FL_GPTIM_IC_FILTER(__VALUE__) (((__VALUE__) == FL_GPTIM_IC_FILTER_DIV1) || \ argument
80 #define IS_FL_GPTIM_CHANNEL(__VALUE__) (((__VALUE__) == FL_GPTIM_CHANNEL_1)\ argument
97 #define IS_FL_GPTIM_TRIGGER_SRC(__VALUE__) (((__VALUE__) ==FL_GPTIM_TIM_TS_ITR0 )\ argument
126 #define IS_FL_GPTIM_ETR_PSC(__VALUE__) (((__VALUE__) == FL_GPTIM_ETR_PSC_DIV1) ||\ argument
141 #define IS_FL_GPTIM_IC_PSC(__VALUE__) (((__VALUE__) == FL_GPTIM_IC_PSC_DIV1) \ argument
158 #define IS_FL_GPTIM_OC_FASTMODE(__VALUE__) (((__VALUE__) == FL_ENABLE) \ argument
161 #define IS_FL_GPTIM_OC_PRELOAD(__VALUE__) (((__VALUE__) == FL_ENABLE) \ argument
164 #define IS_FL_GPTIM_OC_ETR_CLEARN(__VALUE__) (((__VALUE__) == FL_ENABLE) \ argument
168 #define IS_FL_GPTIM_TRIGGER_DELAY(__VALUE__) (((__VALUE__) == FL_DISABLE) \ argument
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| A D | fm33lc0xx_fl_lptim32.c | 43 #define IS_FL_LPTIM32_OPCLK_SOURCE(__VALUE__) (((__VALUE__) == FL_RCC_LPT… argument
48 #define IS_FL_LPTIM32_CLK_SOURCE(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
51 #define IS_FL_LPTIM32_PRESCALER(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
60 #define IS_FL_LPTIM32_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
65 #define IS_FL_LPTIM32_ETR_TRIGEER_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
69 #define IS_FL_LPTIM32_ONE_PULSE_MODE(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
72 #define IS_FL_LPTIM32_ETR_COUNT_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
75 #define IS_FL_LPTIM32_IC_EDGE(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
79 #define IS_FL_LPTIM32_OC_POLARITY(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
82 #define IS_FL_LPTIM32_CHANNEL(__VALUE__) (((__VALUE__) == FL_LPTIM32… argument
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| A D | fm33lc0xx_fl_u7816.c | 44 #define IS_FL_U7816_CLOCK_FRQUENCE(__VALUE__) (((__VALUE__) >=1000000)||\ argument
47 #define IS_FL_U7816_TX_PARITHERROR_AUTO_RETRY(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
50 #define IS_FL_U7816_RETRY_CNT(__VALUE__) (((__VALUE__) == FL_U7816_RETRY… argument
53 #define IS_FL_U7816_BLOCKGUARD(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ argument
56 #define IS_FL_U7816_AUTO_PULL(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ argument
59 #define IS_FL_U7816_PARITH(__VALUE__) (((__VALUE__) == FL_U7816_PARIT… argument
64 #define IS_FL_U7816_TX_GUARD(__VALUE__) (((__VALUE__) == FL_U7816_TX_GU… argument
67 #define IS_FL_U7816_RX_GUARD(__VALUE__) (((__VALUE__) == FL_U7816_RX_GU… argument
70 #define IS_FL_U7816_ERROR_GUARD(__VALUE__) (((__VALUE__) == FL_U7816_ERRO… argument
77 #define IS_FL_U7816_RX_AUTO_ERROR_SIG(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
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| A D | fm33lc0xx_fl_opa.c | 44 #define IS_FL_OPA_INP_CHANNAL(__VALUE__) (((__VALUE__) == FL_OPA_INP_SOURCE_INP1)… argument
48 #define IS_FL_OPA_INN_CHANNAL(__VALUE__) (((__VALUE__) == FL_OPA_INN_SOURCE_INN1)… argument
56 #define IS_FL_OPA_MODE(__VALUE__) (((__VALUE__) == FL_OPA_MODE_STANDALONE)… argument
61 #define IS_FL_OPA_DIGITALFILTER(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
62 ((__VALUE__) == FL_ENABLE))
64 #define IS_FL_OPA_NEGTIVE_TO_PIN(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
65 ((__VALUE__) == FL_ENABLE))
67 #define IS_FL_OPA_LOW_POWER_MODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
68 ((__VALUE__) == FL_ENABLE))
70 #define IS_FL_OPA_GAIN(__VALUE__) (((__VALUE__) == FL_OPA_GAIN_X2)||\ argument
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| A D | fm33lc0xx_fl_dma.c | 43 #define IS_FL_DMA_PRIORITY(__VALUE__) (((__VALUE__) == FL_DMA_PRIORIT… argument
44 … ((__VALUE__) == FL_DMA_PRIORITY_MEDIUM)||\
45 … ((__VALUE__) == FL_DMA_PRIORITY_HIGH)||\
48 #define IS_FL_DMA_CIRC_MODE(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
49 ((__VALUE__) == FL_ENABLE))
52 #define IS_FL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == FL_DMA_DIR_PER… argument
58 #define IS_FL_DMA_DATA_SIZE(__VALUE__) (((__VALUE__) == FL_DMA_BANDWID… argument
59 … ((__VALUE__) == FL_DMA_BANDWIDTH_32B)||\
60 … ((__VALUE__) == FL_DMA_BANDWIDTH_16B))
62 #define IS_FL_DMA_INCMODE(__VALUE__) (((__VALUE__) == FL_DMA_MEMORY_I… argument
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| A D | fm33lc0xx_fl_svd.c | 42 #define IS_FL_SVD_WARNING_THRESHOLD_LEVEL(__VALUE__) (((__VALUE__) == FL_SVD_WARNING… argument
43 … ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP1)||\
44 … ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP2)||\
45 … ((__VALUE__) == FL_SVD_WARNING_THRESHOLD_GROUP3)||\
59 #define IS_FL_SVD_SVSCONFIG(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
60 ((__VALUE__) == FL_ENABLE))
62 #define IS_FL_SVD_REFERENCE_VOLTAGE(__VALUE__) (((__VALUE__) == FL_SVD_REFERENCE_1P2V)|… argument
63 … ((__VALUE__) == FL_SVD_REFERENCE_1P1V)||\
64 ((__VALUE__) == FL_SVD_REFERENCE_1P0V))
66 #define IS_FL_SVD_DIGITAL_FILTER(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
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| A D | fm33lc0xx_fl_spi.c | 43 #define IS_FL_SPI_MODE(__VALUE__) (((__VALUE__) == FL_SPI_WORK_MODE_S… argument
44 … ((__VALUE__) == FL_SPI_WORK_MODE_MASTER))
46 #define IS_FL_SPI_BITORDER(__VALUE__) (((__VALUE__) == FL_SPI_BIT_ORDER_M… argument
49 #define IS_FL_SPI_DATAWIDT(__VALUE__) (((__VALUE__) == FL_SPI_DATA_WIDTH_… argument
52 … ((__VALUE__) == FL_SPI_DATA_WIDTH_32B))
54 #define IS_FL_SPI_CLOCK_PHASE(__VALUE__) (((__VALUE__) == FL_SPI_PHASE_EDGE1… argument
55 … ((__VALUE__) == FL_SPI_PHASE_EDGE2))
57 #define IS_FL_SPI_CLOCK_POLARITY(__VALUE__) (((__VALUE__) == FL_SPI_POLARITY_NO… argument
58 … ((__VALUE__) == FL_SPI_POLARITY_INVERT))
60 #define IS_FL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == FL_SPI_BAUDRATE_DI… argument
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| A D | fm33lc0xx_fl_lcd.c | 43 #define IS_FL_LCD_BIASCURRENT(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_CURRENT_VERYH… argument
46 ((__VALUE__) == (FL_LCD_BIAS_CURRENT_LOW)))
48 #define IS_FL_LCD_ENMODE(__VALUE__) ((__VALUE__) == (FL_LCD_DRIVER_MODE_INNER_R… argument
50 #define IS_FL_LCD_BIASVOLTAGE(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_VOLTAGE_LEVEL… argument
67 #define IS_FL_LCD_BIASMD(__VALUE__) (((__VALUE__) == (FL_LCD_BIAS_MODE_4BIAS))|… argument
68 ((__VALUE__) == (FL_LCD_BIAS_MODE_3BIAS)))
70 #define IS_FL_LCD_BWFT(__VALUE__) (((__VALUE__) == (FL_LCD_WAVEFORM_TYPEA))||\ argument
71 ((__VALUE__) == (FL_LCD_WAVEFORM_TYPEB)))
73 #define IS_FL_LCD_LMUX(__VALUE__) (((__VALUE__) == (FL_LCD_COM_NUM_4COM))||\ argument
74 ((__VALUE__) == (FL_LCD_COM_NUM_6COM))||\
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| A D | fm33lc0xx_fl_pmu.c | 43 #define IS_FL_PMU_MODE(__VALUE__) (((__VALUE__) == FL_PMU_POWER_MODE_ACTI… argument
47 #define IS_FL_PMU_COREVOLTAGESCALING(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
48 ((__VALUE__) == FL_ENABLE))
50 #define IS_FL_PMU_DEEPSLEEP(__VALUE__) (((__VALUE__) == FL_PMU_SLEEP_MODE_DEEP… argument
51 … ((__VALUE__) == FL_PMU_SLEEP_MODE_NORMAL))
53 #define IS_FL_PMU_WAKEUPFREQUENCY(__VALUE__) (((__VALUE__) == FL_PMU_RCHF_WAKEUP_FRE… argument
57 #define IS_FL_PMU_LDOLOWMODE(__VALUE__) (((__VALUE__) == FL_PMU_LDO_LPM_DISABLE… argument
58 ((__VALUE__) == FL_PMU_LDO_LPM_ENABLE))
60 #define IS_FL_PMU_WAKEUPDELAY(__VALUE__) (((__VALUE__) == FL_PMU_WAKEUP_DELAY_0U… argument
61 … ((__VALUE__) == FL_PMU_WAKEUP_DELAY_2US)||\
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| A D | fm33lc0xx_fl_lpuart.c | 43 #define IS_FL_LPUART_CLKSRC(__VALUE__) (((__VALUE__) == FL_RCC_LPUART_CLK_SOURC… argument
47 #define IS_FL_LPUART_BAUDRATE(__VALUE__) (((__VALUE__) == FL_LPUART_BAUDRATE_300… argument
48 … ((__VALUE__) == FL_LPUART_BAUDRATE_600)||\
52 … ((__VALUE__) == FL_LPUART_BAUDRATE_9600))
54 #define IS_FL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == FL_LPUART_DATA_WIDTH_6… argument
57 … ((__VALUE__) == FL_LPUART_DATA_WIDTH_9B))
59 #define IS_FL_LPUART_STOPBITS(__VALUE__) (((__VALUE__) == FL_LPUART_STOP_BIT_WID… argument
62 #define IS_FL_LPUART_PARITY(__VALUE__) (((__VALUE__) == FL_LPUART_PARITY_NONE)… argument
63 … ((__VALUE__) == FL_LPUART_PARITY_EVEN)||\
64 ((__VALUE__) == FL_LPUART_PARITY_ODD))
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| A D | fm33lc0xx_fl_uart.c | 47 #define IS_FL_UART_CLKSRC(__VALUE__) (((__VALUE__) == FL_RCC_UART1_CLK_SOURCE_AP… argument
57 #define IS_FL_UART_DATAWIDTH(__VALUE__) (((__VALUE__) == FL_UART_DATA_WIDTH_7B)||\ argument
60 ((__VALUE__) == FL_UART_DATA_WIDTH_6B))
62 #define IS_FL_UART_STOPBITS(__VALUE__) (((__VALUE__) == FL_UART_STOP_BIT_WIDTH_1… argument
65 #define IS_FL_UART_PARITY(__VALUE__) (((__VALUE__) == FL_UART_PARITY_NONE)||\ argument
67 ((__VALUE__) == FL_UART_PARITY_ODD))
69 #define IS_FL_UART_DIRECTION(__VALUE__) (((__VALUE__) == FL_UART_DIRECTION_NONE)|… argument
74 #define IS_FL_UART_INFRA_MODULATION(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
75 ((__VALUE__) == FL_ENABLE))
78 #define IS_FL_UART_INFRARED_POLARITY(__VALUE__) (((__VALUE__) == FL_UART_INFRARED_PO… argument
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| A D | fm33lc0xx_fl_aes.c | 43 #define IS_FL_AES_KEYLENGTH(__VALUE__) (((__VALUE__) == FL_AES_KEY_LENGTH_128… argument
45 … ((__VALUE__) == FL_AES_KEY_LENGTH_256B))
47 #define IS_FL_AES_CIPHERMODE(__VALUE__) (((__VALUE__) == FL_AES_CIPHER_ECB)||\ argument
48 ((__VALUE__) == FL_AES_CIPHER_CBC)||\
49 ((__VALUE__) == FL_AES_CIPHER_CTR)||\
50 ((__VALUE__) == FL_AES_CIPHER_MULTH))
52 #define IS_FL_AES_OPERATIONMODE(__VALUE__) (((__VALUE__) == FL_AES_OPERATION_MODE_… argument
57 #define IS_FL_AES_DATATYPE(__VALUE__) (((__VALUE__) == FL_AES_DATA_TYPE_32B)|… argument
58 … ((__VALUE__) == FL_AES_DATA_TYPE_16B)||\
59 ((__VALUE__) == FL_AES_DATA_TYPE_8B)||\
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| A D | fm33lc0xx_fl_gpio.c | 46 #define IS_FL_GPIO_PIN(__VALUE__) ((((uint32_t)0x00000000U) < (__VALUE__))… argument
47 ((__VALUE__) <= (FL_GPIO_PIN_ALL)))
49 #define IS_FL_GPIO_MODE(__VALUE__) (((__VALUE__) == FL_GPIO_MODE_ANALOG)||\ argument
54 #define IS_FL_GPIO_OPENDRAIN(__VALUE__) (((__VALUE__) == FL_GPIO_OUTPUT_OPENDRA… argument
57 #define IS_FL_GPIO_PULL_UP(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
58 ((__VALUE__) == FL_ENABLE))
61 #define IS_FL_GPIO_WKUP_ENTRY(__VALUE__) (((__VALUE__) == FL_GPIO_WAKEUP_INT_ENT… argument
64 #define IS_FL_GPIO_WKUP_EDGE(__VALUE__) (((__VALUE__) == FL_GPIO_WAKEUP_TRIGGER… argument
68 #define IS_FL_GPIO_WKUP_NUM(__VALUE__) (((__VALUE__) == FL_GPIO_WAKEUP_0)||\ argument
69 ((__VALUE__) == FL_GPIO_WAKEUP_1)||\
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| A D | fm33lc0xx_fl_i2c.c | 43 #define IS_FL_I2C_BAUDRATE(__VALUE__) (((__VALUE__) > 0 )&&((__VALUE__) <… argument
45 #define IS_FL_I2C_CLOCKSRC(__VALUE__) (((__VALUE__) == FL_RCC_I2C_CLK_SOU… argument
50 #define IS_FL_I2C_MSATER_TIMEOUT(__VALUE__) (((__VALUE__) == FL_IWDT_PERIOD_125… argument
54 #define IS_FL_I2C_SLAVE_ACK(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ argument
55 ((__VALUE__) == FL_DISABLE))
59 #define IS_FL_I2C_ANGLOGFILTER(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ argument
60 ((__VALUE__) == FL_DISABLE))
62 #define IS_FL_I2C_ADDRSIZE10BIT(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ argument
63 ((__VALUE__) == FL_DISABLE))
65 #define IS_FL_I2C_SLAVE_SCLSEN(__VALUE__) (((__VALUE__) == FL_ENABLE)||\ argument
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| A D | fm33lc0xx_fl_comp.c | 44 #define IS_FL_COMP_POSITIVEINPUT(__VALUE__) (((__VALUE__) == FL_COMP_INP_SOURCE_INP1… argument
45 … ((__VALUE__) == FL_COMP_INP_SOURCE_INP2)||\
46 … ((__VALUE__) == FL_COMP_INP_SOURCE_INP3))
48 #define IS_FL_COMP_NEGATIVEINPUT(__VALUE__) (((__VALUE__) == FL_COMP_INN_SOURCE_INN1… argument
49 … ((__VALUE__) == FL_COMP_INN_SOURCE_INN2)||\
50 … ((__VALUE__) == FL_COMP_INN_SOURCE_VREF)||\
51 … ((__VALUE__) == FL_COMP_INN_SOURCE_VREF_DIV_2))
53 #define IS_FL_COMP_POLARITY(__VALUE__) (((__VALUE__) == FL_COMP_OUTPUT_POLARITY… argument
56 #define IS_FL_COMP_EDGE(__VALUE__) (((__VALUE__) == FL_COMP_INTERRUPT_EDGE_… argument
60 #define IS_FL_COMP_DIGITAL_FILTER(__VALUE__) (((__VALUE__) == FL_DISABLE)||\ argument
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| A D | fm33lc0xx_fl_crc.c | 43 #define IS_FL_CRC_POLYNOMIAL_WIDTH(__VALUE__) (((__VALUE__) == FL_CRC_POLYNOM… argument
44 … ((__VALUE__) == FL_CRC_POLYNOMIAL_32B)||\
45 … ((__VALUE__) == FL_CRC_POLYNOMIAL_8B)||\
46 … ((__VALUE__) == FL_CRC_POLYNOMIAL_7B))
48 #define IS_FL_CRC_DR_WIDTH(__VALUE__) (((__VALUE__) == FL_CRC_DATA_WI… argument
49 … ((__VALUE__) == FL_CRC_DATA_WIDTH_32B))
52 #define IS_FL_CRC_OUPUT_REFLECTE_MODE(__VALUE__) (((__VALUE__) == FL_CRC_OUPUT_I… argument
53 … ((__VALUE__) == FL_CRC_OUPUT_INVERT_BYTE))
55 #define IS_FL_CRC_INPUT_REFLECTE_MODE(__VALUE__) (((__VALUE__) == FL_CRC_INPUT_I… argument
58 … ((__VALUE__) == FL_CRC_INPUT_INVERT_WORD))
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| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Src/ |
| A D | stm32l1xx_ll_spi.c | 63 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ argument
68 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ argument
71 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \ argument
74 #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \ argument
77 #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \ argument
80 #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \ argument
93 #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \ argument
99 #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U) argument
305 #define IS_LL_I2S_CPOL(__VALUE__) (((__VALUE__) == LL_I2S_POLARITY_LOW) \ argument
314 #define IS_LL_I2S_MODE(__VALUE__) (((__VALUE__) == LL_I2S_MODE_SLAVE_TX) \ argument
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| A D | stm32l1xx_ll_gpio.c | 47 #define IS_LL_GPIO_PIN(__VALUE__) (((0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GP… argument
49 #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ argument
52 ((__VALUE__) == LL_GPIO_MODE_ANALOG))
54 #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ argument
57 #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ argument
62 #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\ argument
64 ((__VALUE__) == LL_GPIO_PULL_DOWN))
66 #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ argument
67 ((__VALUE__) == LL_GPIO_AF_1 ) ||\
68 ((__VALUE__) == LL_GPIO_AF_2 ) ||\
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| A D | stm32l1xx_ll_utils.c | 68 #define IS_LL_UTILS_SYSCLK_DIV(__VALUE__) (((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ argument
78 #define IS_LL_UTILS_APB1_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB1_DIV_1) \ argument
79 || ((__VALUE__) == LL_RCC_APB1_DIV_2) \
80 || ((__VALUE__) == LL_RCC_APB1_DIV_4) \
81 || ((__VALUE__) == LL_RCC_APB1_DIV_8) \
82 || ((__VALUE__) == LL_RCC_APB1_DIV_16))
84 #define IS_LL_UTILS_APB2_DIV(__VALUE__) (((__VALUE__) == LL_RCC_APB2_DIV_1) \ argument
90 #define IS_LL_UTILS_PLLMUL_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL_MUL_3) \ argument
100 #define IS_LL_UTILS_PLLDIV_VALUE(__VALUE__) (((__VALUE__) == LL_RCC_PLL_DIV_2) || ((__VALUE__) == L… argument
103 …efine IS_LL_UTILS_PLLVCO_OUTPUT(__VALUE__) ((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAG… argument
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| A D | stm32l1xx_ll_usart.c | 64 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U) argument
66 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ argument
71 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ argument
75 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \ argument
78 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ argument
81 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ argument
84 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ argument
87 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ argument
90 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ argument
93 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ argument
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| A D | stm32l1xx_ll_i2c.c | 49 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ argument
50 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
51 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
54 #define IS_LL_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= LL_I2C_MA… argument
56 #define IS_LL_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) || \ argument
57 ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9))
59 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) argument
61 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ argument
62 ((__VALUE__) == LL_I2C_NACK))
64 #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ argument
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| A D | stm32l1xx_ll_dma.c | 47 #define IS_LL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY)… argument
51 #define IS_LL_DMA_MODE(__VALUE__) (((__VALUE__) == LL_DMA_MODE_NORMAL) || \ argument
52 ((__VALUE__) == LL_DMA_MODE_CIRCULAR))
54 #define IS_LL_DMA_PERIPHINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) || \ argument
57 #define IS_LL_DMA_MEMORYINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) || \ argument
60 #define IS_LL_DMA_PERIPHDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE) || \ argument
62 ((__VALUE__) == LL_DMA_PDATAALIGN_WORD))
64 #define IS_LL_DMA_MEMORYDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_MDATAALIGN_BYTE) || \ argument
66 ((__VALUE__) == LL_DMA_MDATAALIGN_WORD))
68 #define IS_LL_DMA_NBDATA(__VALUE__) ((__VALUE__) <= 0x0000FFFFU) argument
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| A D | stm32l1xx_ll_tim.c | 48 #define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \ argument
54 #define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \ argument
58 #define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \ argument
67 #define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \ argument
70 #define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \ argument
73 #define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \ argument
77 #define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \ argument
82 #define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \ argument
99 #define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \ argument
103 #define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \ argument
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