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Searched refs:__arm_wsr (Results 1 – 25 of 52) sorted by relevance

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/bsp/renesas/rzn2l_rsk/rzn/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h265 #define __arm_wsr __iar_builtin_wsr macro
276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE)))
310 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
321 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
330 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
336 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
338 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/renesas/rzt2m_rsk/rzt/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h265 #define __arm_wsr __iar_builtin_wsr macro
276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE)))
310 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
321 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
330 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
336 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
338 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/renesas/rzn2l_etherkit/rzn/arm/CMSIS_5/CMSIS/Core_R/Include/
A Dcmsis_iccarm.h265 #define __arm_wsr __iar_builtin_wsr macro
276 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
279 #define __set_FPEXC(VALUE) (__arm_wsr("FPEXC", (VALUE)))
310 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
314 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
321 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
324 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
330 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
336 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
338 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/synwit/libraries/SWM341_CSL/CMSIS/CoreSupport/
A Dcmsis_iccarm.h298 #define __arm_wsr __iar_builtin_wsr macro
309 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
337 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
339 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
341 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
348 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
351 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
357 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
363 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
365 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/acm32/acm32f4xx-nucleo/libraries/CMSIS/
A Dcmsis_iccarm.h298 #define __arm_wsr __iar_builtin_wsr macro
309 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
337 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
339 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
341 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
348 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
351 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
357 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
363 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
365 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/hc32l136/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h296 #define __arm_wsr __iar_builtin_wsr macro
307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
335 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
337 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
361 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
363 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/microchip/samd51-adafruit-metro-m4/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/microchip/samc21/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/msp432e401y-LaunchPad/libraries/Drivers/CMSIS/Include/
A Dcmsis_iccarm.h275 #define __arm_wsr __iar_builtin_wsr macro
286 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
314 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
316 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
318 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
325 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
328 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
334 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
340 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
342 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/n32/libraries/N32L43x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/n32/libraries/N32WB452_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/n32/libraries/N32L40x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/n32/libraries/N32G43x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/n32/libraries/N32G45x_Firmware_Library/CMSIS/core/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/tae32f5300/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h298 #define __arm_wsr __iar_builtin_wsr macro
309 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
337 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
339 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
341 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
348 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
351 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
357 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
363 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
365 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/hc32l196/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h296 #define __arm_wsr __iar_builtin_wsr macro
307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
335 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
337 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
361 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
363 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/microchip/saml10/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/
A Dcmsis_iccarm.h296 #define __arm_wsr __iar_builtin_wsr macro
307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
335 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
337 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
361 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
363 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/microchip/same70/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/n32g452xx/Libraries/N32_Std_Driver/CMSIS/core/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]
/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/stm32/libraries/HAL_Drivers/CMSIS/Include/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/nrf5x/libraries/cmsis/include/
A Dcmsis_iccarm.h296 #define __arm_wsr __iar_builtin_wsr macro
307 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
335 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
337 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
339 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
346 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
349 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
355 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
361 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
363 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
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/bsp/microchip/samd51-seeed-wio-terminal/bsp/CMSIS/Core/Include/
A Dcmsis_iccarm.h267 #define __arm_wsr __iar_builtin_wsr macro
278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
[all …]

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