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/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/arch/risc-v/t-head/
A Drv_pmp.c12 __asm volatile("csrw pmpaddr0, %0" in rvpmp_reg_write()
18 __asm volatile("csrw pmpaddr1, %0" in rvpmp_reg_write()
24 __asm volatile("csrw pmpaddr2, %0" in rvpmp_reg_write()
30 __asm volatile("csrw pmpaddr3, %0" in rvpmp_reg_write()
36 __asm volatile("csrw pmpaddr4, %0" in rvpmp_reg_write()
42 __asm volatile("csrw pmpaddr5, %0" in rvpmp_reg_write()
48 __asm volatile("csrw pmpaddr6, %0" in rvpmp_reg_write()
54 __asm volatile("csrw pmpaddr7, %0" in rvpmp_reg_write()
60 __asm volatile("csrw pmpaddr8, %0" in rvpmp_reg_write()
308 __asm volatile ("fence":::"memory"); in rvpmp_init()
[all …]
A Drv_hpm.h73 __asm volatile("csrw mcounteren, %0" in RV_HPM_Set_mcounteren()
82 __asm volatile("csrw mcounteren, %0" in RV_HPM_Set_scounteren()
109 __asm volatile("csrw mhpmevent3, 1" in RV_HPM_L1_ICache_Miss_Init_M()
113 __asm volatile("csrw mhpmevent4, 2" in RV_HPM_L1_ICache_Miss_Init_M()
137 __asm volatile("csrw mhpmevent8, 6" in RV_HPM_L1_BrPredict_Miss_Init_M()
141 __asm volatile("csrw mhpmevent9, 7" in RV_HPM_L1_BrPredict_Miss_Init_M()
149 __asm volatile("csrw mhpmevent9, 6" in RV_HPM_L1_BrPredict_Miss_Init_M()
153 __asm volatile("csrw mhpmevent10, 7" in RV_HPM_L1_BrPredict_Miss_Init_M()
271 __asm volatile("csrw mhpmevent5, 3" in RV_HPM_TLB_Miss_Init_M()
275 __asm volatile("csrw mhpmevent6, 4" in RV_HPM_TLB_Miss_Init_M()
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A Drv_syscall.h12 register uintptr_t a0 __asm("a0") = (uintptr_t)(arg0); \
13 register uintptr_t a1 __asm("a1") = (uintptr_t)(arg1); \
14 register uintptr_t a2 __asm("a2") = (uintptr_t)(arg2); \
15 register uintptr_t a3 __asm("a3") = (uintptr_t)(arg3); \
16 register uintptr_t a7 __asm("a7") = (uintptr_t)(which); \
27 register uintptr_t a0 __asm("a0") = (uintptr_t)(arg0); \
28 register uintptr_t a1 __asm("a1") = (uintptr_t)(arg1); \
29 register uintptr_t a2 __asm("a2") = (uintptr_t)(arg2); \
30 register uintptr_t a3 __asm("a3") = (uintptr_t)(arg3); \
31 register uintptr_t a5 __asm("a5") = (uintptr_t)(which); \
/bsp/lm4f232/Libraries/driverlib/
A Dcpu.c43 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
64 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
77 __asm unsigned long
157 __asm unsigned long
237 __asm unsigned long
282 __asm(" wfi\n" in CPUwfi()
293 __asm(" wfi\n"); in CPUwfi()
297 __asm void
314 __asm(" wfi\n"); in CPUwfi()
346 __asm void
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/bsp/lm3s9b9x/Libraries/driverlib/
A Dcpu.c43 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
64 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
77 __asm unsigned long
157 __asm unsigned long
237 __asm unsigned long
282 __asm(" wfi\n" in CPUwfi()
293 __asm(" wfi\n"); in CPUwfi()
297 __asm void
314 __asm(" wfi\n"); in CPUwfi()
346 __asm void
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/bsp/lm3s8962/Libraries/driverlib/
A Dcpu.c43 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
64 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
77 __asm unsigned long
157 __asm unsigned long
237 __asm unsigned long
282 __asm(" wfi\n" in CPUwfi()
293 __asm(" wfi\n"); in CPUwfi()
297 __asm void
314 __asm(" wfi\n"); in CPUwfi()
346 __asm void
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/bsp/tm4c123bsp/libraries/TivaWare_C_series/tm4c123_driverlib/src/
A Dcpu.c59 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
80 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
93 __asm uint32_t
173 __asm uint32_t
253 __asm uint32_t
298 __asm(" wfi\n" in CPUwfi()
309 __asm(" wfi\n"); in CPUwfi()
313 __asm void
330 __asm(" wfi\n"); in CPUwfi()
361 __asm void
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/bsp/msp432e401y-LaunchPad/libraries/msp432e4/driverlib/
A Dcpu.c57 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
78 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
91 __asm uint32_t
171 __asm uint32_t
251 __asm uint32_t
296 __asm(" wfi\n" in CPUwfi()
307 __asm(" wfi\n"); in CPUwfi()
311 __asm void
328 __asm(" wfi\n"); in CPUwfi()
359 __asm void
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/bsp/tm4c129x/libraries/driverlib/
A Dcpu.c59 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
80 __asm(" mrs r0, PRIMASK\n" in CPUcpsid()
93 __asm uint32_t
173 __asm uint32_t
253 __asm uint32_t
298 __asm(" wfi\n" in CPUwfi()
309 __asm(" wfi\n"); in CPUwfi()
313 __asm void
330 __asm(" wfi\n"); in CPUwfi()
361 __asm void
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/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/HPM6750/
A Dhpm_interrupt.h364 __asm volatile("\n\
392 __asm volatile("\n\
416 __asm volatile("\n\
444 __asm volatile("\n\
470 __asm volatile("\n\
498 __asm volatile("\n\
522 __asm volatile("\n\
550 __asm volatile("\n\
585 __asm volatile("\n\
643 __asm volatile("\n\
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/bsp/hpmicro/libraries/hpm_sdk/soc/HPM5300/HPM5361/
A Dhpm_interrupt.h364 __asm volatile("\n\
392 __asm volatile("\n\
416 __asm volatile("\n\
444 __asm volatile("\n\
470 __asm volatile("\n\
498 __asm volatile("\n\
522 __asm volatile("\n\
550 __asm volatile("\n\
585 __asm volatile("\n\
643 __asm volatile("\n\
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/bsp/hpmicro/libraries/hpm_sdk/soc/HPM5300/HPM5301/
A Dhpm_interrupt.h364 __asm volatile("\n\
392 __asm volatile("\n\
416 __asm volatile("\n\
444 __asm volatile("\n\
470 __asm volatile("\n\
498 __asm volatile("\n\
522 __asm volatile("\n\
550 __asm volatile("\n\
585 __asm volatile("\n\
643 __asm volatile("\n\
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/bsp/apollo2/libraries/drivers/hal/
A Dam_hal_interrupt.c284 __asm(" cpsie i"); in am_hal_interrupt_master_enable()
285 __asm(" bx lr"); in am_hal_interrupt_master_enable()
288 __asm uint32_t
302 __asm(" cpsie i"); in am_hal_interrupt_master_enable()
303 __asm(" bx lr"); in am_hal_interrupt_master_enable()
333 __asm(" bx lr"); in am_hal_interrupt_master_disable()
336 __asm uint32_t
351 __asm(" bx lr"); in am_hal_interrupt_master_disable()
381 __asm(" bx lr"); in am_hal_interrupt_master_set()
384 __asm void
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/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6800/HPM6880/
A Dhpm_interrupt.h569 __asm volatile("\n\
597 __asm volatile("\n\
621 __asm volatile("\n\
649 __asm volatile("\n\
675 __asm volatile("\n\
703 __asm volatile("\n\
727 __asm volatile("\n\
755 __asm volatile("\n\
790 __asm volatile("\n\
848 __asm volatile("\n\
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/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6E00/HPM6E80/
A Dhpm_interrupt.h569 __asm volatile("\n\
597 __asm volatile("\n\
621 __asm volatile("\n\
649 __asm volatile("\n\
675 __asm volatile("\n\
703 __asm volatile("\n\
727 __asm volatile("\n\
755 __asm volatile("\n\
790 __asm volatile("\n\
848 __asm volatile("\n\
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/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6200/HPM6280/
A Dhpm_interrupt.h569 __asm volatile("\n\
597 __asm volatile("\n\
621 __asm volatile("\n\
649 __asm volatile("\n\
675 __asm volatile("\n\
703 __asm volatile("\n\
727 __asm volatile("\n\
755 __asm volatile("\n\
790 __asm volatile("\n\
848 __asm volatile("\n\
[all …]
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6300/HPM6360/
A Dhpm_interrupt.h569 __asm volatile("\n\
597 __asm volatile("\n\
621 __asm volatile("\n\
649 __asm volatile("\n\
675 __asm volatile("\n\
703 __asm volatile("\n\
727 __asm volatile("\n\
755 __asm volatile("\n\
790 __asm volatile("\n\
848 __asm volatile("\n\
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/bsp/upd70f3454/drivers/
A DCG_system.c46 __asm("_loop: set1 1,0xF82C[r0]"); //__IO_REG8_BIT( PLLCTL, 0xFFFFF82C, __READ_WRITE ) in clock_pll_mode()
47 __asm(" tst1 1,0xF82C[r0]"); //__IO_REG8_BIT( PLLCTL, 0xFFFFF82C, __READ_WRITE ) in clock_pll_mode()
48 __asm(" bz _loop"); in clock_pll_mode()
74 __asm("mov 0x00, r10"); /* Set general-purpose register data to be set to special register. */ in clock_pcc_mode()
75 …__asm("st.b r10, 0xF1FC[r0]"); /* Write to PRCMD register. */ //__IO_REG8(PRCMD, 0xFFFFF1FC, __WR… in clock_pcc_mode()
76 …__asm("st.b r10, 0xF828[r0]"); /* Set PCC register. */ //__IO_REG8_BIT(PCC, 0xFFFFF828, __READ_W… in clock_pcc_mode()
77 __asm("nop"); /* Insert five or more NOP instructions. */ in clock_pcc_mode()
78 __asm("nop"); in clock_pcc_mode()
79 __asm("nop"); in clock_pcc_mode()
80 __asm("nop"); in clock_pcc_mode()
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/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/mcu/all/
A Dbsp_cache.c86 __asm volatile ("DSB SY"); in R_BSP_CacheEnableInst()
90 __asm volatile ("ISB SY"); in R_BSP_CacheEnableInst()
103 __asm volatile ("DSB SY"); in R_BSP_CacheEnableData()
107 __asm volatile ("ISB SY"); in R_BSP_CacheEnableData()
120 __asm volatile ("DSB SY"); in R_BSP_CacheEnableMemoryProtect()
124 __asm volatile ("ISB SY"); in R_BSP_CacheEnableMemoryProtect()
137 __asm volatile ("DSB SY"); in R_BSP_CacheDisableInst()
141 __asm volatile ("ISB SY"); in R_BSP_CacheDisableInst()
154 __asm volatile ("DSB SY"); in R_BSP_CacheDisableData()
158 __asm volatile ("ISB SY"); in R_BSP_CacheDisableData()
[all …]
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/mcu/all/
A Dbsp_cache.c86 __asm volatile ("DSB SY"); in R_BSP_CacheEnableInst()
90 __asm volatile ("ISB SY"); in R_BSP_CacheEnableInst()
103 __asm volatile ("DSB SY"); in R_BSP_CacheEnableData()
107 __asm volatile ("ISB SY"); in R_BSP_CacheEnableData()
120 __asm volatile ("DSB SY"); in R_BSP_CacheEnableMemoryProtect()
124 __asm volatile ("ISB SY"); in R_BSP_CacheEnableMemoryProtect()
137 __asm volatile ("DSB SY"); in R_BSP_CacheDisableInst()
141 __asm volatile ("ISB SY"); in R_BSP_CacheDisableInst()
154 __asm volatile ("DSB SY"); in R_BSP_CacheDisableData()
158 __asm volatile ("ISB SY"); in R_BSP_CacheDisableData()
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/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/mcu/all/
A Dbsp_cache.c86 __asm volatile ("DSB SY"); in R_BSP_CacheEnableInst()
90 __asm volatile ("ISB SY"); in R_BSP_CacheEnableInst()
103 __asm volatile ("DSB SY"); in R_BSP_CacheEnableData()
107 __asm volatile ("ISB SY"); in R_BSP_CacheEnableData()
120 __asm volatile ("DSB SY"); in R_BSP_CacheEnableMemoryProtect()
124 __asm volatile ("ISB SY"); in R_BSP_CacheEnableMemoryProtect()
137 __asm volatile ("DSB SY"); in R_BSP_CacheDisableInst()
141 __asm volatile ("ISB SY"); in R_BSP_CacheDisableInst()
154 __asm volatile ("DSB SY"); in R_BSP_CacheDisableData()
158 __asm volatile ("ISB SY"); in R_BSP_CacheDisableData()
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/bsp/apollo2/libraries/drivers/regs/
A Dam_reg_macros_asm.h74 __asm(" mrs %0, PRIMASK" : "=r"(ui32Primask_04172010)); \
75 __asm(" cpsid i");
78 __asm(" msr PRIMASK, %0" : : "r"(ui32Primask_04172010)); \
89 __asm \
96 __asm \
110 __asm(" mrs %0, PRIMASK" : "=r"(ui32Primask_04172010)); \
111 __asm(" cpsid i");
114 __asm(" msr PRIMASK, %0" : : "r"(ui32Primask_04172010)); \
132 #define AM_ASM_BKPT(n) __asm(" bkpt "#n);
143 #define AM_ASM_WFI __asm(" wfi");
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/bsp/hpmicro/libraries/hpm_sdk/arch/riscv/
A Driscv_core.h22 #define write_fcsr(v) __asm volatile("fscsr %0" : : "r"(v))
30 #define clear_csr(csr_num, bit) __asm volatile("csrc %0, %1" : : "i"(csr_num), "r"(bit))
40 #define read_clear_csr(csr_num, bit) ({ volatile uint32_t v = 0; __asm volatile("csrrc %0, %1, %2" …
50 #define read_set_csr(csr_num, bit) ({ volatile uint32_t v = 0; __asm volatile("csrrs %0, %1, %2" : …
58 #define set_csr(csr_num, bit) __asm volatile("csrs %0, %1" : : "i"(csr_num), "r"(bit))
66 #define write_csr(csr_num, v) __asm volatile("csrw %0, %1" : : "i"(csr_num), "r"(v))
75 #define read_csr(csr_num) ({ uint32_t v; __asm volatile("csrr %0, %1" : "=r"(v) : "i"(csr_num)); v;…
82 #define read_fcsr() ({ uint32_t v; __asm volatile("frcsr %0" : "=r"(v)); v; })
88 #define fencei() __asm volatile("fence.i")
94 #define fencerw() __asm volatile("fence rw, rw")
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/bsp/allwinner/libraries/sunxi-hal/include/hal/sdmmc/sys/
A Dinterrupt.h51 __asm { in arch_irq_save()
63 __asm { msr IRQMASK_REG_NAME_W, flags } in arch_irq_restore()
126 __asm volatile( in arch_irq_save()
138 __asm volatile( in arch_irq_restore()
152 __asm volatile( in arch_irq_get_flags()
162 #define arch_irq_enable() __asm volatile("cpsie i" : : : "memory", "cc")
167 #define arch_irq_disable() __asm volatile("cpsid i" : : : "memory", "cc")
172 #define arch_fiq_enable() __asm volatile("cpsie f" : : : "memory", "cc")
177 #define arch_fiq_disable() __asm volatile("cpsid f" : : : "memory", "cc")
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl602/std/startup/
A Dinterrupt.c191 __asm volatile("addi sp,sp,-8"); in default_interrupt_handler()
192 __asm volatile("csrr a0,mcause"); in default_interrupt_handler()
193 __asm volatile("csrr a1,mepc"); in default_interrupt_handler()
194 __asm volatile("sw a0,4(sp)"); in default_interrupt_handler()
195 __asm volatile("sw a1,0(sp)"); in default_interrupt_handler()
196 __asm volatile("csrsi mstatus,8"); in default_interrupt_handler()
199 __asm volatile("lw a1,0(sp)"); in default_interrupt_handler()
200 __asm volatile("lw a0,4(sp)"); in default_interrupt_handler()
201 __asm volatile("csrw mepc,a1"); in default_interrupt_handler()
202 __asm volatile("csrw mcause,a0"); in default_interrupt_handler()
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