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/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/
A DREADME.md15 * Delivers dual-cores, with a 150-MHz Arm Cortex-M4 as the primary application processor and a 100-…
16 * 256-KB Flash and 128-KB SRAM for customer application on CM4
35 …ms that are enabled can be changed by creating a custom BSP or by editing the application makefile.
42 …abled by default, specifies that the HAL is intended to be used by the application. This will caus…
43 … and instead to invoke the application-defined function `cybsp_register_custom_sysclk_pm_callback`…
/bsp/Infineon/psoc6-cy8ckit-062-BLE/libs/TARGET_CY8CKIT-062-BLE/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct18 ;* application image should be placed there.
69 ; The size of the Cortex-M0+ application flash image
70 ; Size and start address of the Cortex-M0+ application image
111 ; Cortex-M0+ application flash image area
120 ; Cortex-M4 application flash area
162 ; Used for the digital signature of the secure application and the
163 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8ckit-062s4/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
101 ; Cortex-M0+ application flash image area
110 ; Cortex-M4 application flash area
152 ; Used for the digital signature of the secure application and the
153 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
101 ; Cortex-M0+ application flash image area
110 ; Cortex-M4 application flash area
152 ; Used for the digital signature of the secure application and the
153 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/
A DREADME.md17 * Delivers dual-cores, with a 150-MHz Arm® Cortex®-M4 as the primary application processor and a 10…
30 …ms that are enabled can be changed by creating a custom BSP or by editing the application makefile.
37 …abled by default, specifies that the HAL is intended to be used by the application. This will caus…
38 … and instead to invoke the application-defined function `cybsp_register_custom_sysclk_pm_callback`…
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/
A DREADME.md17 * Delivers dual-cores, with a 150-MHz Arm Cortex-M4 as the primary application processor and a 100-…
30 …ms that are enabled can be changed by creating a custom BSP or by editing the application makefile.
37 …abled by default, specifies that the HAL is intended to be used by the application. This will caus…
38 … and instead to invoke the application-defined function `cybsp_register_custom_sysclk_pm_callback`…
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/
A DREADME.md17 * Delivers dual-cores, with a 150-MHz Arm Cortex-M4 as the primary application processor and a 100-…
28 …ms that are enabled can be changed by creating a custom BSP or by editing the application makefile.
35 …abled by default, specifies that the HAL is intended to be used by the application. This will caus…
36 … and instead to invoke the application-defined function `cybsp_register_custom_sysclk_pm_callback`…
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/
A DREADME.md17 * Delivers dual-cores, with a 150-MHz Arm Cortex-M4 as the primary application processor and a 100-…
30 …ms that are enabled can be changed by creating a custom BSP or by editing the application makefile.
37 …abled by default, specifies that the HAL is intended to be used by the application. This will caus…
38 … and instead to invoke the application-defined function `cybsp_register_custom_sysclk_pm_callback`…
/bsp/microchip/saml10/bsp/gcc/gcc/
A Dsaml10e16a_sram.ld45 /* The stack size used by the application. NOTE: you need to adjust according to your application. …
48 /* The heapsize used by the application. NOTE: you need to adjust according to your application. */
A Dsaml10e16a_flash.ld45 /* The stack size used by the application. NOTE: you need to adjust according to your application. …
48 /* The heapsize used by the application. NOTE: you need to adjust according to your application. */
/bsp/microchip/same70/bsp/same70b/gcc/gcc/
A Dsame70q21b_sram.ld45 /* The stack size used by the application. NOTE: you need to adjust according to your application. …
48 /* The heapsize used by the application. NOTE: you need to adjust according to your application. */
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
159 ; Used for the digital signature of the secure application and the
160 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
159 ; Used for the digital signature of the secure application and the
160 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-evaluationkit-062S2/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
160 ; Used for the digital signature of the secure application and the
161 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
160 ; Used for the digital signature of the secure application and the
161 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/linker/TOOLCHAIN_ARM/
A Dcy8c6xx7_cm4_dual.sct16 ;* application image should be placed there.
64 ; Size of the Cortex-M0+ application flash image
105 ; Cortex-M0+ application flash image area
114 ; Cortex-M4 application flash area
156 ; Used for the digital signature of the secure application and the
157 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8ckit-062-BLE/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
159 ; Used for the digital signature of the secure application and the
160 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
160 ; Used for the digital signature of the secure application and the
161 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/libs/TARGET_CY8CKIT-062-WIFI-BT/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
159 ; Used for the digital signature of the secure application and the
160 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
159 ; Used for the digital signature of the secure application and the
160 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
159 ; Used for the digital signature of the secure application and the
160 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/libraries/templates/PSOC62/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
159 ; Used for the digital signature of the secure application and the
160 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct16 ;* application image should be placed there.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
117 ; Cortex-M4 application flash area
159 ; Used for the digital signature of the secure application and the
160 ; Bootloader SDK application. The size of the section depends on the required
/bsp/Infineon/psoc6-cy8ckit-062-BLE/libs/TARGET_CY8CKIT-062-BLE/
A DREADME.md28 …ms that are enabled can be changed by creating a custom BSP or by editing the application makefile.
35 …abled by default, specifies that the HAL is intended to be used by the application. This will caus…
36 … and instead to invoke the application-defined function `cybsp_register_custom_sysclk_pm_callback`…
/bsp/microchip/samc21/bsp/samc21/gcc/gcc/
A Dsamc21j18a_flash.ld42 /* The stack size used by the application. NOTE: you need to adjust according to your application. …
45 /* The heapsize used by the application. NOTE: you need to adjust according to your application. */

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