1 /**
2   ******************************************************************************
3   * @file    bl602_xip_sflash_ext.c
4   * @version V1.0
5   * @date
6   * @brief   This file is the standard driver c file
7   ******************************************************************************
8   * @attention
9   *
10   * <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
11   *
12   * Redistribution and use in source and binary forms, with or without modification,
13   * are permitted provided that the following conditions are met:
14   *   1. Redistributions of source code must retain the above copyright notice,
15   *      this list of conditions and the following disclaimer.
16   *   2. Redistributions in binary form must reproduce the above copyright notice,
17   *      this list of conditions and the following disclaimer in the documentation
18   *      and/or other materials provided with the distribution.
19   *   3. Neither the name of Bouffalo Lab nor the names of its contributors
20   *      may be used to endorse or promote products derived from this software
21   *      without specific prior written permission.
22   *
23   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33   *
34   ******************************************************************************
35   */
36 
37 #include "string.h"
38 #include "bflb_sf_cfg.h"
39 #include "bl602_sf_cfg_ext.h"
40 #include "bflb_xip_sflash.h"
41 #include "bl602_xip_sflash_ext.h"
42 
43 /** @addtogroup  BL602_Peripheral_Driver
44  *  @{
45  */
46 
47 /** @addtogroup  XIP_SFLASH_EXT
48  *  @{
49  */
50 
51 /** @defgroup  XIP_SFLASH_EXT_Private_Macros
52  *  @{
53  */
54 
55 /*@} end of group XIP_SFLASH_EXT_Private_Macros */
56 
57 /** @defgroup  XIP_SFLASH_EXT_Private_Types
58  *  @{
59  */
60 
61 /*@} end of group XIP_SFLASH_EXT_Private_Types */
62 
63 /** @defgroup  XIP_SFLASH_EXT_Private_Variables
64  *  @{
65  */
66 
67 static spi_flash_cfg_type flash_cfg;
68 static uint8_t aes_enable;
69 
70 /*@} end of group XIP_SFLASH_EXT_Private_Variables */
71 
72 /** @defgroup  XIP_SFLASH_EXT_Global_Variables
73  *  @{
74  */
75 
76 /*@} end of group XIP_SFLASH_EXT_Global_Variables */
77 
78 /** @defgroup  XIP_SFLASH_EXT_Private_Fun_Declaration
79  *  @{
80  */
81 
82 /*@} end of group XIP_SFLASH_EXT_Private_Fun_Declaration */
83 
84 /** @defgroup  XIP_SFLASH_EXT_Private_Functions
85  *  @{
86  */
87 
88 /*@} end of group XIP_SFLASH_EXT_Private_Functions */
89 
90 /** @defgroup  XIP_SFLASH_EXT_Public_Functions
91  *  @{
92  */
93 
94 /****************************************************************************//**
95  * @brief  Save flash controller state
96  *
97  * @param  p_flash_cfg: Flash config pointer
98  * @param  offset: CPU XIP flash offset pointer
99  *
100  * @return 0 or -1
101  *
102 *******************************************************************************/
103 __WEAK
bflb_xip_sflash_state_save_ext(spi_flash_cfg_type * p_flash_cfg,uint32_t * offset,uint8_t group,uint8_t bank)104 int ATTR_TCM_SECTION bflb_xip_sflash_state_save_ext(spi_flash_cfg_type *p_flash_cfg,uint32_t *offset,
105                                                                          uint8_t group, uint8_t bank)
106 {
107     /* XIP_SFlash_Delay */
108     volatile uint32_t i=32*2;
109     while(i--);
110 
111     bflb_sf_ctrl_set_owner(SF_CTRL_OWNER_SAHB);
112     /* Exit form continous read for accepting command */
113     bflb_sflash_reset_continue_read(p_flash_cfg);
114     /* Send software reset command(80bv has no this command)to deburst wrap for ISSI like */
115     bflb_sflash_software_reset(p_flash_cfg);
116     /* For disable command that is setting register instaed of send command, we need write enable */
117     bflb_sflash_disable_burst_wrap(p_flash_cfg);
118     if ((p_flash_cfg->io_mode & 0x0f) == SF_CTRL_QO_MODE || (p_flash_cfg->io_mode & 0x0f) == SF_CTRL_QIO_MODE) {
119         /* Enable QE again in case reset command make it reset */
120         bflb_sflash_qspi_enable(p_flash_cfg);
121     }
122     /* Deburst again to make sure */
123     bflb_sflash_disable_burst_wrap(p_flash_cfg);
124 
125     /* Clear offset setting*/
126     *offset=bflb_sf_ctrl_get_flash_image_offset(group, bank);
127     bflb_sf_ctrl_set_flash_image_offset(0, group, bank);
128 
129     return 0;
130 }
131 
132 /****************************************************************************//**
133  * @brief  Restore flash controller state
134  *
135  * @param  p_flash_cfg: Flash config pointer
136  * @param  offset: CPU XIP flash offset
137  *
138  * @return 0 or -1
139  *
140 *******************************************************************************/
141 __WEAK
bflb_xip_sflash_state_restore_ext(spi_flash_cfg_type * p_flash_cfg,uint32_t offset,uint8_t group,uint8_t bank)142 int ATTR_TCM_SECTION bflb_xip_sflash_state_restore_ext(spi_flash_cfg_type *p_flash_cfg, uint32_t offset,
143                                                                             uint8_t group, uint8_t bank)
144 {
145     uint32_t tmp[1];
146     uint8_t io_mode = p_flash_cfg->io_mode & 0xf;
147 
148     bflb_sf_ctrl_set_flash_image_offset(offset, group, bank);
149 
150     if (((p_flash_cfg->io_mode >> 4) & 0x01) == 0) {
151         if ((p_flash_cfg->io_mode & 0x0f) == SF_CTRL_QO_MODE || (p_flash_cfg->io_mode & 0x0f) == SF_CTRL_QIO_MODE) {
152             bflb_sflash_set_burst_wrap(p_flash_cfg);
153         }
154     }
155     bflb_sflash_read(p_flash_cfg, io_mode, 1, 0x0, (uint8_t *)tmp, sizeof(tmp));
156     bflb_sflash_set_xip_cfg(p_flash_cfg, io_mode, 1, 0, 32, bank);
157 
158     return 0;
159 }
160 
161 /*@} end of group XIP_SFLASH_EXT_Public_Functions */
162 
163 /** @defgroup  XIP_SFLASH_EXT_Public_Functions
164  *  @{
165  */
166 
167 /****************************************************************************/ /**
168  * @brief  Erase flash one region
169  *
170  * @param  p_flash_cfg: Flash config pointer
171  * @param  startaddr: start address to erase
172  * @param  endaddr: end address(include this address) to erase
173  *
174  * @return 0 or -1
175  *
176 *******************************************************************************/
177 __WEAK
bflb_xip_sflash_erase_need_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint32_t startaddr,uint32_t endaddr,uint8_t group,uint8_t bank)178 int ATTR_TCM_SECTION bflb_xip_sflash_erase_need_lock_ext(spi_flash_cfg_type *p_flash_cfg, uint32_t startaddr,
179                                                                uint32_t endaddr, uint8_t group, uint8_t bank)
180 {
181     int stat = -1;
182     uint32_t offset;
183     uint8_t io_mode = p_flash_cfg->io_mode&0xf;
184 
185     bflb_xip_sflash_opt_enter(&aes_enable);
186     stat=bflb_xip_sflash_state_save(p_flash_cfg,&offset,group,bank);
187     if(stat!=0){
188         bflb_sflash_set_xip_cfg(p_flash_cfg,io_mode,1,0,32,bank);
189     }else{
190         stat=bflb_sflash_erase(p_flash_cfg,startaddr,endaddr);
191         bflb_xip_sflash_state_restore_ext(p_flash_cfg,offset,group,bank);
192     }
193     bflb_xip_sflash_opt_exit(aes_enable);
194 
195     return stat;
196 }
197 
198 /****************************************************************************/ /**
199  * @brief  Program flash one region
200  *
201  * @param  p_flash_cfg: Flash config pointer
202  * @param  addr: start address to be programed
203  * @param  data: data pointer to be programed
204  * @param  len: data length to be programed
205  *
206  * @return 0 or -1
207  *
208 *******************************************************************************/
209 __WEAK
bflb_xip_sflash_write_need_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint32_t addr,uint8_t * data,uint32_t len,uint8_t group,uint8_t bank)210 int ATTR_TCM_SECTION bflb_xip_sflash_write_need_lock_ext(spi_flash_cfg_type *p_flash_cfg, uint32_t addr,
211                                                uint8_t *data, uint32_t len, uint8_t group, uint8_t bank)
212 {
213     int stat = -1;
214     uint32_t offset;
215     uint8_t io_mode = p_flash_cfg->io_mode&0xf;
216 
217     bflb_xip_sflash_opt_enter(&aes_enable);
218     stat=bflb_xip_sflash_state_save(p_flash_cfg,&offset,group,bank);
219     if(stat!=0){
220         bflb_sflash_set_xip_cfg(p_flash_cfg,io_mode,1,0,32,bank);
221     }else{
222         stat= bflb_sflash_program(p_flash_cfg,io_mode,addr,data,len);
223         bflb_xip_sflash_state_restore_ext(p_flash_cfg,offset,group,bank);
224     }
225     bflb_xip_sflash_opt_exit(aes_enable);
226 
227     return stat;
228 }
229 
230 /****************************************************************************/ /**
231  * @brief  Read data from flash
232  *
233  * @param  p_flash_cfg: Flash config pointer
234  * @param  addr: flash read start address
235  * @param  data: data pointer to store data read from flash
236  * @param  len: data length to read
237  *
238  * @return 0 or -1
239  *
240 *******************************************************************************/
241 __WEAK
bflb_xip_sflash_read_need_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint32_t addr,uint8_t * data,uint32_t len,uint8_t group,uint8_t bank)242 int ATTR_TCM_SECTION bflb_xip_sflash_read_need_lock_ext(spi_flash_cfg_type *p_flash_cfg, uint32_t addr,
243                                               uint8_t *data, uint32_t len, uint8_t group, uint8_t bank)
244 {
245     int stat = -1;
246     uint32_t offset;
247     uint8_t io_mode = p_flash_cfg->io_mode&0xf;
248 
249     bflb_xip_sflash_opt_enter(&aes_enable);
250     stat=bflb_xip_sflash_state_save(p_flash_cfg, &offset, group, bank);
251     if(stat!=0){
252         bflb_sflash_set_xip_cfg(p_flash_cfg, io_mode, 1, 0, 32, bank);
253     }else{
254         stat=bflb_sflash_read(p_flash_cfg, io_mode,0, addr, data, len);
255         bflb_xip_sflash_state_restore_ext(p_flash_cfg, offset, group, bank);
256     }
257     bflb_xip_sflash_opt_exit(aes_enable);
258 
259     return stat;
260 }
261 
262 /****************************************************************************//**
263  * @brief  Clear flash status register need lock
264  *
265  * @param  p_flash_cfg: Flash config pointer
266  *
267  * @return 0 or -1
268  *
269 *******************************************************************************/
270 __WEAK
bflb_xip_sflash_clear_status_register_need_lock(spi_flash_cfg_type * p_flash_cfg,uint8_t group,uint8_t bank)271 int ATTR_TCM_SECTION bflb_xip_sflash_clear_status_register_need_lock(spi_flash_cfg_type *p_flash_cfg,
272                                                                          uint8_t group, uint8_t bank)
273 {
274     int stat = -1;
275     uint32_t offset;
276     uint8_t io_mode = p_flash_cfg->io_mode&0xf;
277 
278     stat=bflb_xip_sflash_state_save(p_flash_cfg, &offset, group, bank);
279     if (stat != 0) {
280         bflb_sflash_set_xip_cfg(p_flash_cfg, io_mode, 1, 0, 32, bank);
281     } else {
282         stat=bflb_sflash_clear_status_register(p_flash_cfg);
283         bflb_xip_sflash_state_restore_ext(p_flash_cfg, offset,  group, bank);
284     }
285 
286     return stat;
287 }
288 
289 /****************************************************************************//**
290  * @brief  Get Flash Jedec ID
291  *
292  * @param  p_flash_cfg: Flash config pointer
293  * @param  data: data pointer to store Jedec ID Read from flash
294  *
295  * @return 0 or -1
296  *
297 *******************************************************************************/
298 __WEAK
bflb_xip_sflash_getjedecid_need_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint8_t * data,uint8_t group,uint8_t bank)299 int ATTR_TCM_SECTION bflb_xip_sflash_getjedecid_need_lock_ext(spi_flash_cfg_type *p_flash_cfg, uint8_t *data,
300                                                                                  uint8_t group, uint8_t bank)
301 {
302     int stat = -1;
303     uint32_t offset;
304     uint8_t io_mode = p_flash_cfg->io_mode & 0xf;
305 
306     stat = bflb_xip_sflash_state_save(p_flash_cfg, &offset, group, bank);
307     if (stat != 0) {
308         bflb_sflash_set_xip_cfg(p_flash_cfg, io_mode, 1, 0, 32, bank);
309     } else {
310         bflb_sflash_get_jedecid(p_flash_cfg, data);
311         bflb_xip_sflash_state_restore_ext(p_flash_cfg, offset, group, bank);
312     }
313 
314     return 0;
315 }
316 
317 /****************************************************************************/ /**
318  * @brief  Get Flash Device ID
319  *
320  * @param  p_flash_cfg: Flash config pointer
321  * @param  data: data pointer to store Device ID Read from flash
322  *
323  * @return 0 or -1
324  *
325 *******************************************************************************/
326 __WEAK
bflb_xip_sflash_get_deviceid_need_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint8_t is_32bits_addr,uint8_t * data,uint8_t group,uint8_t bank)327 int ATTR_TCM_SECTION bflb_xip_sflash_get_deviceid_need_lock_ext(spi_flash_cfg_type *p_flash_cfg,
328                              uint8_t is_32bits_addr, uint8_t *data, uint8_t group, uint8_t bank)
329 {
330     int stat = -1;
331     uint32_t offset;
332     uint8_t io_mode = p_flash_cfg->io_mode & 0xf;
333 
334     stat = bflb_xip_sflash_state_save(p_flash_cfg, &offset, group, bank);
335     if (stat != 0) {
336         bflb_sflash_set_xip_cfg(p_flash_cfg, io_mode, 1, 0, 32, bank);
337     } else {
338         bflb_sflash_get_deviceid(data, is_32bits_addr);
339         bflb_xip_sflash_state_restore_ext(p_flash_cfg, offset, group, bank);
340     }
341 
342     return 0;
343 }
344 
345 /****************************************************************************/ /**
346  * @brief  Get Flash Unique ID
347  *
348  * @param  p_flash_cfg: Flash config pointer
349  * @param  data: data pointer to store Device ID Read from flash
350  * @param  id_len: Unique id len
351  *
352  * @return 0 or -1
353  *
354 *******************************************************************************/
355 __WEAK
bflb_xip_sflash_get_uniqueid_need_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint8_t * data,uint8_t id_len,uint8_t group,uint8_t bank)356 int ATTR_TCM_SECTION bflb_xip_sflash_get_uniqueid_need_lock_ext(spi_flash_cfg_type *p_flash_cfg, uint8_t *data,
357                                                                 uint8_t id_len, uint8_t group, uint8_t bank)
358 {
359     int stat = -1;
360     uint32_t offset;
361     uint8_t io_mode = p_flash_cfg->io_mode & 0xf;
362 
363     stat = bflb_xip_sflash_state_save(p_flash_cfg, &offset, group, bank);
364     if (stat != 0) {
365         bflb_sflash_set_xip_cfg(p_flash_cfg, io_mode, 1, 0, 32, bank);
366     } else {
367         bflb_sflash_get_uniqueid(data, id_len);
368         bflb_xip_sflash_state_restore_ext(p_flash_cfg, offset, group, bank);
369     }
370 
371     return 0;
372 }
373 
374 /****************************************************************************/ /**
375  * @brief  Sflash enable RCV mode to recovery for erase while power drop need lock
376  *
377  * @param  p_flash_cfg: Flash config pointer
378  * @param  r_cmd: Read RCV register cmd
379  * @param  w_cmd: Write RCV register cmd
380  * @param  bit_pos: RCV register bit pos
381  *
382  * @return 0 or -1
383  *
384 *******************************************************************************/
385 __WEAK
bflb_xip_sflash_rcv_enable_need_lock(spi_flash_cfg_type * p_flash_cfg,uint8_t r_cmd,uint8_t w_cmd,uint8_t bit_pos,uint8_t group,uint8_t bank)386 int ATTR_TCM_SECTION bflb_xip_sflash_rcv_enable_need_lock(spi_flash_cfg_type *p_flash_cfg, uint8_t r_cmd, uint8_t w_cmd,
387                                                           uint8_t bit_pos, uint8_t group, uint8_t bank)
388 {
389     int stat = -1;
390     uint32_t offset;
391     uint8_t io_mode = p_flash_cfg->io_mode & 0xf;
392 
393     stat = bflb_xip_sflash_state_save(p_flash_cfg, &offset, group, bank);
394     if (stat != 0) {
395         bflb_sflash_set_xip_cfg(p_flash_cfg, io_mode, 1, 0, 32 , bank);
396     } else {
397         stat = bflb_sflash_rcv_enable(p_flash_cfg, r_cmd, w_cmd, bit_pos);
398         bflb_xip_sflash_state_restore_ext(p_flash_cfg, offset, group, bank);
399     }
400 
401     return stat;
402 }
403 
404 /****************************************************************************//**
405  * @brief  Read data from flash with lock
406  *
407  * @param  p_flash_cfg: Flash config pointer
408  * @param  addr: flash read start address
409  * @param  dst: data pointer to store data read from flash
410  * @param  len: data length to read
411  *
412  * @return 0
413  *
414 *******************************************************************************/
415 __WEAK
bflb_xip_sflash_read_with_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint32_t addr,uint8_t * dst,int len)416 int ATTR_TCM_SECTION bflb_xip_sflash_read_with_lock_ext(spi_flash_cfg_type *p_flash_cfg,uint32_t addr, uint8_t *dst, int len)
417 {
418     __disable_irq();
419     bflb_xip_sflash_read_need_lock_ext(p_flash_cfg, addr, dst, len, 0, 0);
420     __enable_irq();
421     return 0;
422 }
423 
424 /****************************************************************************//**
425  * @brief  Program flash one region with lock
426  *
427  * @param  p_flash_cfg: Flash config pointer
428  * @param  addr: Start address to be programed
429  * @param  src: Data pointer to be programed
430  * @param  len: Data length to be programed
431  *
432  * @return 0
433  *
434 *******************************************************************************/
435 __WEAK
bflb_ip_sflash_write_with_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint32_t addr,uint8_t * src,int len)436 int ATTR_TCM_SECTION bflb_ip_sflash_write_with_lock_ext(spi_flash_cfg_type *p_flash_cfg,uint32_t addr, uint8_t *src, int len)
437 {
438     __disable_irq();
439     bflb_xip_sflash_write_need_lock_ext(p_flash_cfg, addr, src, len, 0, 0);
440     __enable_irq();
441     return 0;
442 }
443 
444 /****************************************************************************//**
445  * @brief  Erase flash one region with lock
446  *
447  * @param  p_flash_cfg: Flash config pointer
448  * @param  addr: Start address to be erased
449  * @param  len: Data length to be erased
450  *
451  * @return 0
452  *
453 *******************************************************************************/
454 __WEAK
bflb_xip_sflash_erase_with_lock_ext(spi_flash_cfg_type * p_flash_cfg,uint32_t addr,int len)455 int ATTR_TCM_SECTION bflb_xip_sflash_erase_with_lock_ext(spi_flash_cfg_type *p_flash_cfg,uint32_t addr, int len)
456 {
457     __disable_irq();
458     bflb_xip_sflash_erase_need_lock_ext(p_flash_cfg, addr, addr + len - 1, 0, 0);
459     __enable_irq();
460     return 0;
461 }
462 
463 /****************************************************************************//**
464  * @brief  Clear flash status register with lock
465  *
466  * @param  p_flash_cfg: Flash config pointer
467  *
468  * @return 0
469  *
470 *******************************************************************************/
471 __WEAK
bflb_xip_sflash_clear_status_register_with_lock(spi_flash_cfg_type * p_flash_cfg)472 int ATTR_TCM_SECTION bflb_xip_sflash_clear_status_register_with_lock(spi_flash_cfg_type *p_flash_cfg)
473 {
474     __disable_irq();
475     bflb_xip_sflash_clear_status_register_need_lock(p_flash_cfg, 0, 0);
476     __enable_irq();
477     return 0;
478 }
479 
480 /****************************************************************************//**
481  * @brief  Sflash enable RCV mode to recovery for erase while power drop with lock
482  *
483  * @param  p_flash_cfg: Flash config pointer
484  * @param  r_cmd: Read RCV register cmd
485  * @param  w_cmd: Write RCV register cmd
486  * @param  bit_pos: RCV register bit pos
487  *
488  * @return 0
489  *
490 *******************************************************************************/
491 __WEAK
bflb_xip_sflash_rcv_enable_with_lock(spi_flash_cfg_type * p_flash_cfg,uint8_t r_cmd,uint8_t w_cmd,uint8_t bit_pos)492 int ATTR_TCM_SECTION bflb_xip_sflash_rcv_enable_with_lock(spi_flash_cfg_type *p_flash_cfg, uint8_t r_cmd, uint8_t w_cmd, uint8_t bit_pos)
493 {
494     __disable_irq();
495     bflb_xip_sflash_rcv_enable_need_lock(p_flash_cfg, r_cmd, w_cmd, bit_pos, 0, 0);
496     __enable_irq();
497     return 0;
498 }
499 
500 /****************************************************************************//**
501  * @brief  Read data from flash with lock
502  *
503  * @param  p_flash_cfg:Flash config pointer
504  *
505  * @return 0 or -1
506  *
507 *******************************************************************************/
508 __WEAK
bflb_xip_sflash_init(spi_flash_cfg_type * p_flash_cfg)509 int ATTR_TCM_SECTION bflb_xip_sflash_init(spi_flash_cfg_type *p_flash_cfg)
510 {
511     uint32_t ret;
512 
513     if(p_flash_cfg==NULL){
514         /* Get flash config identify */
515         bflb_xip_sflash_opt_enter(&aes_enable);
516         ret=bflb_sf_cfg_flash_identify_ext(1, 0x80, 0, &flash_cfg, 0, 0);
517         bflb_xip_sflash_opt_exit(aes_enable);
518         if((ret&BFLB_FLASH_ID_VALID_FLAG)==0){
519             return -1;
520         }
521     }else{
522         memcpy(&flash_cfg,p_flash_cfg,sizeof(flash_cfg));
523     }
524 
525     return 0;
526 }
527 
528 /****************************************************************************//**
529  * @brief  Read data from flash with lock
530  *
531  * @param  addr: flash read start address
532  * @param  dst: data pointer to store data read from flash
533  * @param  len: data length to read
534  *
535  * @return 0
536  *
537 *******************************************************************************/
538 __WEAK
bflb_xip_sflash_read(uint32_t addr,uint8_t * dst,int len)539 int ATTR_TCM_SECTION bflb_xip_sflash_read(uint32_t addr, uint8_t *dst, int len)
540 {
541     __disable_irq();
542     bflb_xip_sflash_opt_enter(&aes_enable);
543     bflb_xip_sflash_read_need_lock_ext(&flash_cfg, addr, dst, len, 0, 0);
544     bflb_xip_sflash_opt_exit(aes_enable);
545     __enable_irq();
546     return 0;
547 }
548 
549 /****************************************************************************//**
550  * @brief  Program flash one region with lock
551  *
552  * @param  addr: Start address to be programed
553  * @param  src: Data pointer to be programed
554  * @param  len: Data length to be programed
555  *
556  * @return 0
557  *
558 *******************************************************************************/
559 __WEAK
bflb_xip_sflash_write(uint32_t addr,uint8_t * src,int len)560 int ATTR_TCM_SECTION bflb_xip_sflash_write(uint32_t addr, uint8_t *src, int len)
561 {
562     __disable_irq();
563     bflb_xip_sflash_opt_enter(&aes_enable);
564     bflb_xip_sflash_write_need_lock_ext(&flash_cfg, addr, src, len, 0, 0);
565     bflb_xip_sflash_opt_exit(aes_enable);
566     __enable_irq();
567     return 0;
568 }
569 
570 /****************************************************************************//**
571  * @brief  Erase flash one region with lock
572  *
573  * @param  addr: Start address to be erased
574  * @param  len: Data length to be erased
575  *
576  * @return 0
577  *
578 *******************************************************************************/
579 __WEAK
bflb_xip_sflash_erase(uint32_t addr,int len)580 int ATTR_TCM_SECTION bflb_xip_sflash_erase(uint32_t addr, int len)
581 {
582     __disable_irq();
583     bflb_xip_sflash_opt_enter(&aes_enable);
584     bflb_xip_sflash_erase_need_lock_ext(&flash_cfg, addr, addr + len - 1, 0, 0);
585     bflb_xip_sflash_opt_exit(aes_enable);
586     __enable_irq();
587     return 0;
588 }
589 /*@} end of group XIP_SFLASH_EXT_Public_Functions */
590 
591 /*@} end of group XIP_SFLASH_EXT */
592 
593 /*@} end of group BL602_Peripheral_Driver */
594