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/bsp/rockchip/common/rk_hal/lib/hal/src/
A Dhal_gpio.c118 uint32_t both = 0, type = 0, plar = 0; in HAL_GPIO_SetIntType() local
120 UNUSED(both); in HAL_GPIO_SetIntType()
126 both = 0; in HAL_GPIO_SetIntType()
131 both = 0; in HAL_GPIO_SetIntType()
136 both = 0; in HAL_GPIO_SetIntType()
141 both = 0; in HAL_GPIO_SetIntType()
146 both = 1; in HAL_GPIO_SetIntType()
158 pGPIO->INT_BOTHEDGE_H = (both) ? (pin | (pin >> 16)) : (pin); in HAL_GPIO_SetIntType()
163 pGPIO->INT_BOTHEDGE_L = (both) ? (pin | (pin << 16)) : (pin << 16); in HAL_GPIO_SetIntType()
170 pGPIO->INT_BOTHEDGE = (both) ? (pin) : (pGPIO->INT_BOTHEDGE & ~(pin)); in HAL_GPIO_SetIntType()
/bsp/efm32/
A DReadme.txt16 …efines to use EFM32 Ethernet utility functions (due to memory limitation, you may not turn on both)
/bsp/microchip/samd51-seeed-wio-terminal/bsp/documentation/
A Dusb_device_cdc.rst7 Models. The device uses both a Data Class interface and a Communication Class interface
/bsp/microchip/samd51-adafruit-metro-m4/bsp/documentation/
A Dusb_device_cdc.rst7 Models. The device uses both a Data Class interface and a Communication Class interface
/bsp/Infineon/libraries/templates/XMC7200D/libs/TARGET_APP_KIT_XMC72_EVK/
A DRELEASE.md6 …BSP_B is at v1.2.0, the event will trigger a version update to v1.4.0 for both BSP_A and BSP_B. Th…
26 * Fixed issue where CM0P prebuilt image would enable both CM7 cores on devices which contain
/bsp/Infineon/xmc7100d-f144k4160aa/libs/TARGET_APP_KIT_XMC71_EVK_LITE_V2/
A DRELEASE.md7 …BSP_B is at v1.2.0, the event will trigger a version update to v1.4.0 for both BSP_A and BSP_B. Th…
32 * Fixed issue where CM0P prebuilt image would enable both CM7 cores on devices which contain
/bsp/Infineon/xmc7200-kit_xmc7200_evk/libs/TARGET_APP_KIT_XMC72_EVK/
A DRELEASE.md6 …BSP_B is at v1.2.0, the event will trigger a version update to v1.4.0 for both BSP_A and BSP_B. Th…
26 * Fixed issue where CM0P prebuilt image would enable both CM7 cores on devices which contain
/bsp/microchip/same54/bsp/hal/documentation/
A Daes_sync.rst11 algorithm, meaning the same key is used for both encrypting and decrypting the
/bsp/microchip/samc21/bsp/samc21/gcc/gcc/
A Dsamc21j18a_sram.ld57 /* Support C constructors, and C destructors in both user code
A Dsamc21j18a_flash.ld86 /* Support C constructors, and C destructors in both user code
/bsp/microchip/same54/bsp/gcc/gcc/
A Dsame54p20a_sram.ld59 /* Support C constructors, and C destructors in both user code
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/gcc/gcc/
A Dsamd51j19a_sram.ld59 /* Support C constructors, and C destructors in both user code
A Dsamd51j19a_flash.ld84 /* Support C constructors, and C destructors in both user code
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/gcc/gcc/
A Dsamd51p19a_sram.ld59 /* Support C constructors, and C destructors in both user code
A Dsamd51p19a_flash.ld84 /* Support C constructors, and C destructors in both user code
/bsp/microchip/saml10/bsp/gcc/gcc/
A Dsaml10e16a_sram.ld64 /* Support C constructors, and C destructors in both user code
A Dsaml10e16a_flash.ld89 /* Support C constructors, and C destructors in both user code
/bsp/microchip/same70/bsp/same70b/gcc/gcc/
A Dsame70q21b_sram.ld64 /* Support C constructors, and C destructors in both user code
A Dsame70q21b_flash.ld89 /* Support C constructors, and C destructors in both user code
/bsp/microchip/samc21/bsp/hal/documentation/
A Dadc_sync.rst35 Usually multiple reference voltages are supported by the ADC, both internal and
/bsp/samd21/sam_d2x_asflib/sam0/utils/linker_scripts/samd21/gcc/
A Dsamd21e16l_sram.ld71 /* Support C constructors, and C destructors in both user code
A Dsamd21e17a_sram.ld71 /* Support C constructors, and C destructors in both user code
A Dsamd21e18a_sram.ld71 /* Support C constructors, and C destructors in both user code
A Dsamd21g15a_sram.ld71 /* Support C constructors, and C destructors in both user code
A Dsamd21g15b_sram.ld71 /* Support C constructors, and C destructors in both user code

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