Home
last modified time | relevance | path

Searched refs:c3 (Results 1 – 12 of 12) sorted by relevance

/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_cam_drv.c40 config->csc_config.yuv2rgb_coef.c3 = 0x79C; in cam_get_default_config()
51 config->csc_config.yuv2rgb_coef.c3 = 0x79C; in cam_get_default_config()
62 config->csc_config.yuv2rgb_coef.c3 = 0; in cam_get_default_config()
143 | CAM_CSC_COEF2_C3_SET(config->csc_config.yuv2rgb_coef.c3); in cam_init()
A Dhpm_lcdc_drv.c85 layer->csc_config.yuv2rgb_coef.c3 = 0x79C; in lcdc_get_default_layer_config()
96 layer->csc_config.yuv2rgb_coef.c3 = 0x79C; in lcdc_get_default_layer_config()
107 layer->csc_config.yuv2rgb_coef.c3 = 0; in lcdc_get_default_layer_config()
235 | LCDC_LAYER_CSC_COEF2_C3_SET(layer->csc_config.yuv2rgb_coef.c3); in lcdc_config_layer()
A Dhpm_pdma_drv.c127 yuv2rgb_coef->c3 = 0x79C; in pdma_get_default_yuv2rgb_coef_config()
136 yuv2rgb_coef->c3 = 0x79C; in pdma_get_default_yuv2rgb_coef_config()
145 yuv2rgb_coef->c3 = 0; in pdma_get_default_yuv2rgb_coef_config()
181 config->rgb2yuv_config.c3 = 0x7DA; in pdma_get_default_output_config()
196 config->rgb2yuv_config.c3 = 0x7DA; in pdma_get_default_output_config()
211 config->rgb2yuv_config.c3 = 0; in pdma_get_default_output_config()
364 | PDMA_YUV2RGB_COEF2_C3_SET(yuv2rgb->c3); in pdma_config_planes()
407 | PDMA_RGB2YUV_COEF2_C3_SET(config->rgb2yuv_config.c3); in pdma_config_output()
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_display_common.h117 uint16_t c3; member
141 uint16_t c3; member
/bsp/raspberry-pi/raspi3-32/cpu/
A Dcp15_gcc.S48 mcr p15, #0, r0, c14, c3, #0 @ write virtual timer timerval register
52 mcr p15, #0, r0, c14, c3, #1 @ write virtual timer control register
/bsp/allwinner_tina/libcpu/
A Dmmu.c27 __asm volatile { mcr p15, 0, value, c3, c0, 0 } in mmu_setttbase()
33 __asm volatile { mcr p15, 0, i, c3, c0, 0 } in mmu_set_domain()
/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/de/lowlevel_v2x/
A Dde_peak_type.h98 unsigned int c3:9; member
A Dde_lti_type.h69 unsigned int c3:8; member
A Dde_lti.c184 lti_dev[sel][chno]->coef1.bits.c3 = 0xc0; in de_lti_set_para()
/bsp/ESP32_C3/
A DREADME_ZH.md33 - MCU:[esp32-c3](https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.…
A DREADME.md26 - MCU: [esp32-c3](https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en…
/bsp/nxp/imx/imx6sx/cortex-a9/cpu/
A DcortexA9_gcc.S145 …mcr p15, 0, r0, c8, c3, 0 @ TLBIALLIS - Invalidate entire unified TLB Inner Sh…

Completed in 24 milliseconds