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Searched refs:cache_ctrl (Results 1 – 9 of 9) sorted by relevance

/bsp/maxim/libraries/MAX32660PeriphDriver/Source/
A Dicc.c47 return (MXC_ICC->cache_ctrl & MXC_F_ICC_CACHE_CTRL_CACHE_RDY); in ICC_Ready()
71 MXC_ICC->cache_ctrl |= MXC_F_ICC_CACHE_CTRL_CACHE_EN; in ICC_Enable()
77 MXC_ICC->cache_ctrl &= ~MXC_F_ICC_CACHE_CTRL_CACHE_EN; in ICC_Disable()
A Dmxc_sys.c405 MXC_ICC->cache_ctrl ^= MXC_F_ICC_CACHE_CTRL_CACHE_EN; in SYS_Flash_Operation()
406 MXC_ICC->cache_ctrl ^= MXC_F_ICC_CACHE_CTRL_CACHE_EN; in SYS_Flash_Operation()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hpl/cmcc/
A Dhpl_cmcc.c77 int32_t _cmcc_configure(const void *hw, struct _cache_cfg *cache_ctrl) in _cmcc_configure() argument
86 … (CMCC_CFG_CSIZESW(cache_ctrl->cache_size) | (cache_ctrl->data_cache_disable << CMCC_CFG_DCDIS_Pos) in _cmcc_configure()
87 | (cache_ctrl->inst_cache_disable << CMCC_CFG_ICDIS_Pos) | (cache_ctrl->gclk_gate_disable))); in _cmcc_configure()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hpl/cmcc/
A Dhpl_cmcc.c77 int32_t _cmcc_configure(const void *hw, struct _cache_cfg *cache_ctrl) in _cmcc_configure() argument
86 … (CMCC_CFG_CSIZESW(cache_ctrl->cache_size) | (cache_ctrl->data_cache_disable << CMCC_CFG_DCDIS_Pos) in _cmcc_configure()
87 | (cache_ctrl->inst_cache_disable << CMCC_CFG_ICDIS_Pos) | (cache_ctrl->gclk_gate_disable))); in _cmcc_configure()
/bsp/microchip/same54/bsp/hpl/cmcc/
A Dhpl_cmcc.c77 int32_t _cmcc_configure(const void *hw, struct _cache_cfg *cache_ctrl) in _cmcc_configure() argument
86 … (CMCC_CFG_CSIZESW(cache_ctrl->cache_size) | (cache_ctrl->data_cache_disable << CMCC_CFG_DCDIS_Pos) in _cmcc_configure()
87 | (cache_ctrl->inst_cache_disable << CMCC_CFG_ICDIS_Pos) | (cache_ctrl->gclk_gate_disable))); in _cmcc_configure()
/bsp/maxim/libraries/MAX32660PeriphDriver/CMSIS/Device/Maxim/MAX32660/Include/
A Dicc_regs.h92 __IO uint32_t cache_ctrl; /**< <tt>\b 0x0100:</tt> ICC CACHE_CTRL Register */ member
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hal/include/
A Dhpl_cmcc.h145 int32_t _cmcc_configure(const void *hw, struct _cache_cfg *cache_ctrl);
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hal/include/
A Dhpl_cmcc.h145 int32_t _cmcc_configure(const void *hw, struct _cache_cfg *cache_ctrl);
/bsp/microchip/same54/bsp/hal/include/
A Dhpl_cmcc.h145 int32_t _cmcc_configure(const void *hw, struct _cache_cfg *cache_ctrl);

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