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Searched refs:cache_way_dis (Results 1 – 6 of 6) sorted by relevance

/bsp/bouffalo_lab/bl808/m0/board/
A Dfw_header.c165 .cpu_cfg[0].cache_way_dis = 0x0, /* cache setting :only for BL Cache*/
182 .cpu_cfg[1].cache_way_dis = 0x0, /* cache setting :only for BL Cache*/
A Dfw_header.h157 uint8_t cache_way_dis : 4; /* cache setting */ member
/bsp/bouffalo_lab/bl808/lp/board/
A Dfw_header.c165 .cpu_cfg[0].cache_way_dis = 0x0, /* cache setting :only for BL Cache*/
182 .cpu_cfg[1].cache_way_dis = 0x0, /* cache setting :only for BL Cache*/
A Dfw_header.h157 uint8_t cache_way_dis : 4; /* cache setting */ member
/bsp/bouffalo_lab/bl61x/board/
A Dfw_header.h147 uint8_t cache_way_dis : 4; /* cache setting */ member
A Dfw_header.c150 .cpu_cfg.cache_way_dis = 0x0, /* cache setting :only for BL Cache*/

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