Searched refs:cacheable (Results 1 – 4 of 4) sorted by relevance
107 ((init->cacheable ? 1 : 0) << MPU_RASR_C_Pos) | in MPU_ConfigureRegion()
134 bool cacheable; /**< Memory cacheable attribute. */ member
29 SRAM : ORIGIN = 0x60000000 , LENGTH = 0x20000 /* SRAM 128KB, no cacheable*/
1425 - samples: sdp: fix non-cacheable data initialization issue
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