| /bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/de/lowlevel_v2x/ |
| A D | de_enhance.c | 208 for (ch_id = 0; ch_id < chno; ch_id++) { in de_enhance_apply()
269 for (ch_id = 0; ch_id < chno; ch_id++) { in de_enhance_set_size()
273 if (size[ch_id].width > size[ch_id].height) { in de_enhance_set_size()
286 de_fce_set_size(screen_id, ch_id, size[ch_id].width, in de_enhance_set_size()
298 de_lti_set_size(screen_id, ch_id, size[ch_id].width, in de_enhance_set_size()
303 de_ase_set_size(screen_id, ch_id, size[ch_id].width, in de_enhance_set_size()
308 de_fcc_set_size(screen_id, ch_id, size[ch_id].width, in de_enhance_set_size()
351 for (ch_id = 0; ch_id < chno; ch_id++) { in de_enhance_tasklet()
367 for (ch_id = 0; ch_id < chno; ch_id++) { in de_enhance_update_regs()
393 for (ch_id = 0; ch_id < vep_num[screen_id]; ch_id++) { in de_enhance_init()
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| A D | de_ccsc.c | 69 if (vep_support[sel][ch_id]) { in de_ccsc_apply()
115 csc_block[sel][ch_id].dirty = 1; in de_ccsc_apply()
122 int ch_id; in de_ccsc_update_regs() local
124 for (ch_id = 0; ch_id < vi_num[sel]; ch_id++) { in de_ccsc_update_regs()
131 if (vep_support[sel][ch_id]) { in de_ccsc_update_regs()
147 int screen_id, ch_id, device_num; in de_ccsc_init() local
155 for (ch_id = 0; ch_id < vi_num[screen_id]; ch_id++) { in de_ccsc_init()
185 screen_id, ch_id, in de_ccsc_init()
199 base_ofst = (ch_id == 0) ? in de_ccsc_init()
233 int screen_id, ch_id, device_num; in de_ccsc_exit() local
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| A D | de_csc.h | 22 int de_ccsc_apply(unsigned int sel, unsigned int ch_id,
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| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/drivers/ |
| A D | etb.c | 36 static int32_t check_is_alloced(int32_t ch_id) in check_is_alloced() argument
42 ch_group = (uint32_t)((uint32_t)ch_id / 8U); in check_is_alloced()
43 ch_offset = (uint32_t)((uint32_t)ch_id % 8U); in check_is_alloced()
56 static void set_ch_alloc_status(int32_t ch_id, uint32_t status) in set_ch_alloc_status() argument
60 ch_group = (uint32_t)((uint32_t)ch_id / 8U); in set_ch_alloc_status()
61 ch_offset = (uint32_t)((uint32_t)ch_id % 8U); in set_ch_alloc_status()
141 void csi_etb_ch_free(int32_t ch_id) in csi_etb_ch_free() argument
144 set_ch_alloc_status(ch_id, 0U); in csi_etb_ch_free()
154 if (ch_id < 3) { in csi_etb_ch_config()
170 void csi_etb_ch_start(int32_t ch_id) in csi_etb_ch_start() argument
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| A D | dma.c | 119 csi_error_t csi_dma_ch_alloc(csi_dma_ch_t *dma_ch, int8_t ch_id, int8_t ctrl_id) in csi_dma_ch_alloc() argument
129 if ((ctrl_id == -1) && (ch_id == -1)) { in csi_dma_ch_alloc()
135 dma_ch->ch_id = ch_info.ch_idx; in csi_dma_ch_alloc()
138 } else if ((ctrl_id >= 0) && (ch_id >= 0)) { in csi_dma_ch_alloc()
139 if (dma_array[ctrl_id]->alloc_status & (uint32_t)((uint32_t)1U << (uint32_t)ch_id)) { in csi_dma_ch_alloc()
142 dma_array[ctrl_id]->alloc_status |= (uint32_t)((uint32_t)1U << (uint32_t)ch_id); in csi_dma_ch_alloc()
143 dma_ch->ch_id = ch_id; in csi_dma_ch_alloc()
181 temp_u32 = 1U << (uint8_t)(dma_ch->ch_id); in csi_dma_ch_free()
184 dma_array[dma_ch->ctrl_id]->alloc_status &= ~((uint32_t)1 << (uint32_t)dma_ch->ch_id); in csi_dma_ch_free()
374 int8_t ch = dma_ch->ch_id; in csi_dma_ch_stop()
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| A D | i2s.c | 35 if (i2s->tx_dma->ch_id == dma->ch_id) { in wj_i2s_dma_event_cb()
42 } else if (i2s->rx_dma->ch_id == dma->ch_id) { in wj_i2s_dma_event_cb()
52 if ((i2s->tx_dma != NULL) && (i2s->tx_dma->ch_id == dma->ch_id)) { in wj_i2s_dma_event_cb()
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| A D | spi.c | 65 if ((spi->tx_dma != NULL) && (spi->tx_dma->ch_id == dma->ch_id)) { in dw_spi_dma_event_cb()
88 } else if ((spi->rx_dma != NULL) && (spi->rx_dma->ch_id == dma->ch_id)) { in dw_spi_dma_event_cb()
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| A D | adc.c | 208 csi_error_t csi_adc_channel_enable(csi_adc_t *adc, uint8_t ch_id, bool is_enable) in csi_adc_channel_enable() argument
222 csi_error_t csi_adc_channel_sampling_time(csi_adc_t *adc, uint8_t ch_id, uint16_t clock_num) in csi_adc_channel_sampling_time() argument
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| A D | uart.c | 572 if ((uart->tx_dma != NULL) && (uart->tx_dma->ch_id == dma->ch_id)) { in dw_uart_dma_event_cb()
594 if ((uart->tx_dma != NULL) && (uart->tx_dma->ch_id == dma->ch_id)) { in dw_uart_dma_event_cb()
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| /bsp/xuantie/libraries/xuantie_libraries/csi/csi2/include/drv/ |
| A D | etb.h | 78 void csi_etb_ch_free(int32_t ch_id);
86 csi_error_t csi_etb_ch_config(int32_t ch_id, csi_etb_config_t *config);
93 void csi_etb_ch_start(int32_t ch_id);
100 void csi_etb_ch_stop(int32_t ch_id);
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| A D | adc.h | 119 csi_error_t csi_adc_channel_enable(csi_adc_t *adc, uint8_t ch_id, bool is_enable);
128 csi_error_t csi_adc_channel_sampling_time(csi_adc_t *adc, uint8_t ch_id, uint16_t clock_num);
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| A D | dma.h | 104 int8_t ch_id; member
149 csi_error_t csi_dma_ch_alloc(csi_dma_ch_t *dma_ch, int8_t ch_id, int8_t ctrl_id);
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| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/sys/ |
| A D | target_get.c | 127 uint32_t spt_id, ch_info_id, ctrl_id, ch_id; in target_get_optimal_dma_channel() local
136 for (ch_id = 0U; ch_id < list[ctrl_id]->ch_num; ch_id++) { in target_get_optimal_dma_channel()
137 if (!(list[ctrl_id]->alloc_status & ((uint32_t)1 << ch_id))) { in target_get_optimal_dma_channel()
138 dma_ch_info->ch_idx = (uint8_t)ch_id; in target_get_optimal_dma_channel()
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