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/bsp/at91/at91sam9260/drivers/
A Dat91_nand.c19 static struct nand_chip_id *chip; variable
240 bufsize = chip->pagesize + chip->oobsize; in at9260_nand_read_id()
243 if (chip->pagesize == 512) in at9260_nand_read_id()
248 else if (chip->pagesize == 2048) in at9260_nand_read_id()
280 for (i = 0; i < chip->oobsize; i++)buff1[i + chip->pagesize] = nand_read_data_byte(); in nand_read_page9260()
395 unsigned int blockpage = blk * (chip->blocksize / chip->pagesize) + 0; in at9260_nand_isbad()
482 unsigned int blockpage = blk * (chip->blocksize / chip->pagesize) + 0; in at9260_nand_markbad()
524 row_address = (block) * (chip->blocksize / chip->pagesize); in at9260_nand_erase_block()
589 _partition[0].pages_per_block = chip->blocksize / chip->pagesize; in rt_hw_mtd_nand_init()
590 _partition[1].pages_per_block = chip->blocksize / chip->pagesize; in rt_hw_mtd_nand_init()
[all …]
/bsp/loongson/ls2kdev/drivers/
A Ddrv_pwm.c42 struct loongson_pwm *chip; in loongson_pwm_enable() local
53 chip = (void *)priv[channel]; in loongson_pwm_enable()
54 chip->ctrl = CTRL_EN; in loongson_pwm_enable()
61 struct loongson_pwm **chip; in loongson_pwm_disable() local
64 chip = device->parent.user_data; in loongson_pwm_disable()
73 struct loongson_pwm *chip; in loongson_pwm_set() local
78 chip = (void *)priv[channel]; in loongson_pwm_set()
80 chip->ctrl &= ~CTRL_EN; in loongson_pwm_set()
81 chip->full_buffer = period; in loongson_pwm_set()
82 chip->low_buffer = pulse; in loongson_pwm_set()
[all …]
/bsp/frdm-k64f/device/MK64F12/
A Dfsl_flexbus.c83 assert(config->chip < FB_CSAR_COUNT); in FLEXBUS_Init()
86 uint32_t chip = 0; in FLEXBUS_Init() local
95 for (chip = 0; chip < FB_CSAR_COUNT; chip++) in FLEXBUS_Init()
98 base->CS[chip].CSMR = 0x0000U; in FLEXBUS_Init()
100 base->CS[chip].CSAR &= (~FB_CSAR_BA_MASK); in FLEXBUS_Init()
102 base->CS[chip].CSCR = 0x0000U; in FLEXBUS_Init()
119 chip = config->chip; in FLEXBUS_Init()
124 base->CS[chip].CSAR = reg_value; in FLEXBUS_Init()
132 base->CS[chip].CSMR = reg_value; in FLEXBUS_Init()
158 base->CS[chip].CSCR = reg_value; in FLEXBUS_Init()
[all …]
/bsp/ti/c28x/tms320f28379d/cmd/
A D2837x_FLASH_lnk_cpu1.cmd13 FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
14 FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
15 FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
16 FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
17 FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
18 FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
19 FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
20 FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
21 FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
22 FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
[all …]
/bsp/hc32/libraries/hc32_drivers/
A Ddrv_sdram.c67 static void _sdram_initialization_sequence(rt_uint32_t chip, rt_uint32_t md_reg_value) in _sdram_initialization_sequence() argument
71 (void)EXMC_DMC_SetCommand(chip, 0UL, EXMC_DMC_CMD_NOP, 0UL); in _sdram_initialization_sequence()
72 (void)EXMC_DMC_SetCommand(chip, 0UL, EXMC_DMC_CMD_PRECHARGE_ALL, 0UL); in _sdram_initialization_sequence()
73 (void)EXMC_DMC_SetCommand(chip, 0UL, EXMC_DMC_CMD_AUTO_REFRESH, 0UL); in _sdram_initialization_sequence()
74 (void)EXMC_DMC_SetCommand(chip, 0UL, EXMC_DMC_CMD_AUTO_REFRESH, 0UL); in _sdram_initialization_sequence()
75 (void)EXMC_DMC_SetCommand(chip, 0UL, EXMC_DMC_CMD_MDREG_CONFIG, md_reg_value); in _sdram_initialization_sequence()
76 (void)EXMC_DMC_SetCommand(chip, 0UL, EXMC_DMC_CMD_NOP, 0UL); in _sdram_initialization_sequence()
/bsp/asm9260t/IAR_ASM9260T_DeviceSupportFile/arm/config/devices/AlphaScale/
A DASM9260T.i798 //What endian modes does the chip support? (le_be8_be32(default), le_be8, le_be32, le, be8_be32, be…
11 //Does the chip support the thumb instruction set? (true(default), false)
14 //Does the chip support the arm instruction set? (true(default), false)
17 //Does the chip have an FPU coprocessor?
/bsp/wch/risc-v/ch569w-evt/board/
A DKconfig11 menu "On-chip Peripheral Drivers"
14 bool "using on-chip uart"
42 bool "using on-chip timer"
61 bool "using on-chip spi"
/bsp/samd21/sam_d2x_asflib/common/services/adp/sam/
A Dadp_interface_twi.c67 .chip = TWI_EDBG_SLAVE_ADDR in adp_interface_init()
81 .chip = TWI_EDBG_SLAVE_ADDR, /* TWI slave bus address */ in adp_interface_send()
100 .chip = TWI_EDBG_SLAVE_ADDR, // TWI slave bus address in adp_interface_read_response()
/bsp/samd21/sam_d2x_asflib/common/components/crypto/sha204/
A Dsha204_i2c.c118 twi_package.chip = 0; in sha204p_wakeup()
149 .chip = device_address, in sha204p_send()
212 .chip = device_address, in sha204p_receive_response()
291 .chip = (uint8_t) 0xFF, in sha204p_resync()
/bsp/renesas/docs/
A DBSP_Peripheral_Driver_Tutorial_of_RA_Series.md9 2. How to use more on-chip resources
10 3. How to add more on-chip resource options
34 …n menu**, **on-chip peripheral configuration menu** and **extension module configuration menu**, u…
64 Configure the SPI1 pins in Pins. **Note: The SSLx chip select pin is set to None, the chip select p…
/bsp/allwinner/d1s/ports/fal/
A Dfal_norflash_sfud_port.c61 nor_flash0.len = sfud_norflash0.chip.capacity; in init()
62 nor_flash0.blk_size = sfud_norflash0.chip.erase_gran; in init()
/bsp/raspberry-pico/RP2040/
A DREADME.md9 - RP2040 microcontroller chip designed by Raspberry Pi in the United Kingdom
19 - Accurate clock and timer on-chip
21 - Accelerated floating-point libraries on-chip
/bsp/stm32/stm32f407-atk-explorer/board/ports/fal/
A Dfal_spi_flash_sfud_port.c43 w25q128.blk_size = sfud_dev->chip.erase_gran; in init()
44 w25q128.len = sfud_dev->chip.capacity; in init()
/bsp/stm32/stm32f407-lckfb-skystar/board/ports/fal/
A Dfal_spi_flash_sfud_port.c43 w25q128.blk_size = sfud_dev->chip.erase_gran; in init()
44 w25q128.len = sfud_dev->chip.capacity; in init()
/bsp/stm32/stm32f407-rt-spark/board/ports/fal/
A Dfal_spi_flash_sfud_port.c43 w25q64.blk_size = sfud_dev->chip.erase_gran; in init()
44 w25q64.len = sfud_dev->chip.capacity; in init()
/bsp/hc32/platform/fal/
A Dfal_flash_sfud_nor.c54 ext_nor_flash0.blk_size = sfud_dev->chip.erase_gran; in init()
55 ext_nor_flash0.len = sfud_dev->chip.capacity; in init()
/bsp/stm32/docs/
A DHow to make a STM32 BSP for RT-Thread.md59 | board.c/h | System clock, GPIO initialization function, chip memory size |
61 | SConscript | Chip startup file, target chip model |
65 Create a CubeMX project based on the target chip. The default CubeMX project is in the **CubeMX_Con…
69 Change the chip model to STM32F103C8Tx in the CubeMX project.
134 The modification of chip model and series is shown in the following table:
169 In this step, you need to modify the chip model and the address of the chip startup file. The modif…
171 ![Modify the startup file and chip model](./figures_en/SConscript.png)
173 …ps reuse the same startup file. At this time, you can generate the target chip project in CubeMX t…
177 …or generating the MDK/IAR project. By modifying the file, you can set the chip model used in the p…
183 ![Select the chip model](./figures_en/template_2.png)
[all …]
/bsp/raspberry-pico/RP2040/applications/lvgl/
A DREADME.md11 - Single chip TFT-LCD Controller/Driver with On-chip Frame Memory (FM)
/bsp/stm32/stm32h750-weact-ministm32h7xx/board/port/
A Ddrv_qspi_flash.c70 nor_flash1.blk_size = sfud_dev->chip.erase_gran; in init()
71 nor_flash1.len = sfud_dev->chip.capacity; in init()
/bsp/stm32/stm32f767-st-nucleo/board/
A DKconfig17 prompt "On-board PHY chip"
31 menu "On-chip Peripheral Drivers"
/bsp/nrf5x/libraries/templates/nrfx/board/
A DKconfig22 menu "On-chip Peripheral Drivers"
42 menu "On-chip flash config"
/bsp/at91/at91sam9260/link_scripts/
A Dat91sam9260_ram.icf12 // Define a region for the on-chip flash.
17 // Define a region for the on-chip SRAM.
/bsp/at91/at91sam9g45/link_scripts/
A Dat91sam9g45_ram.icf12 // Define a region for the on-chip flash.
17 // Define a region for the on-chip SRAM.
/bsp/asm9260t/link_scripts/
A Dsdram.icf12 // Define a region for the on-chip flash. size = 2MB
17 // Define a region for the on-chip SRAM. size = 30MB
/bsp/nrf5x/nrf51822/board/
A DKconfig25 menu "On-chip Peripheral Drivers"
46 menu "On-chip flash config"

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