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Searched refs:chn (Results 1 – 25 of 67) sorted by relevance

123

/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_dma.c37 DMA_CH_Close(chn); //关闭后配置 in DMA_CH_Init()
53 DMA->CH[chn].MUX = 0; in DMA_CH_Init()
88 DMA->PRI &= ~(1 << chn); in DMA_CH_Init()
91 DMA->IM |= (1 << chn); // 默认全部关闭 in DMA_CH_Init()
111 void DMA_CH_Open(uint32_t chn) in DMA_CH_Open() argument
123 void DMA_CH_Close(uint32_t chn) in DMA_CH_Close() argument
164 DMA->CH[chn].SRC = address; in DMA_CH_SetSrcAddress()
177 DMA->CH[chn].DST = address; in DMA_CH_SetDstAddress()
191 DMA->IM &= ~(it << chn); in DMA_CH_INTEn()
207 DMA->IM |= (it << chn); in DMA_CH_INTDis()
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A DSWM341_dma.h109 void DMA_CH_Init(uint32_t chn, DMA_InitStructure * initStruct); //DMA通道配置
110 void DMA_CH_Open(uint32_t chn);
111 void DMA_CH_Close(uint32_t chn);
113 void DMA_CH_SetCount(uint32_t chn, uint32_t count);
114 void DMA_CH_SetSrcAddress(uint32_t chn, uint32_t address);
115 void DMA_CH_SetDstAddress(uint32_t chn, uint32_t address);
116 uint32_t DMA_CH_GetRemaining(uint32_t chn);
118 void DMA_CH_INTEn(uint32_t chn, uint32_t it); //DMA中断使能
119 void DMA_CH_INTDis(uint32_t chn, uint32_t it); //DMA中断禁止
120 void DMA_CH_INTClr(uint32_t chn, uint32_t it); //DMA中断标志清除
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A DSWM341_pwm.c195 if(chn == PWM_CH_A) in PWM_BrkConfig()
274 if(chn == PWM_CH_A) in PWM_OutMask()
332 void PWM_SetHDuty(PWM_TypeDef * PWMx, uint32_t chn, uint16_t hduty) in PWM_SetHDuty() argument
334 if(chn == PWM_CH_A) in PWM_SetHDuty()
348 uint16_t PWM_GetHDuty(PWM_TypeDef * PWMx, uint32_t chn) in PWM_GetHDuty() argument
350 if(chn == PWM_CH_A) in PWM_GetHDuty()
368 if(chn == PWM_CH_A) in PWM_SetHDuty2()
391 if(chn == PWM_CH_A) in PWM_GetHDuty2()
414 if(chn == PWM_CH_A) in PWM_SetDeadzone()
428 uint16_t PWM_GetDeadzone(PWM_TypeDef * PWMx, uint32_t chn) in PWM_GetDeadzone() argument
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/bsp/at32/libraries/usbotg_library/src/
A Dusbh_int.c207 usbd_notify_urbchange_callback(uhost, chn, uhost->urb_state[chn]); in usbh_hch_in_handler()
212 usbd_notify_urbchange_callback(uhost, chn, uhost->urb_state[chn]); in usbh_hch_in_handler()
216 if(((uhost->hch[chn].trans_len / uhost->hch[chn].maxpacket) & 1) != 0) in usbh_hch_in_handler()
263 usbd_notify_urbchange_callback(uhost, chn, uhost->urb_state[chn]); in usbh_hch_in_handler()
387 else if(uhost->hch[chn].state == HCH_NAK || uhost->hch[chn].state == HCH_NYET) in usbh_hch_out_handler()
403 usbd_notify_urbchange_callback(uhost, chn, uhost->urb_state[chn]); in usbh_hch_out_handler()
414 usbd_notify_urbchange_callback(uhost, chn, uhost->urb_state[chn]); in usbh_hch_out_handler()
496 uint8_t chn; in usbh_rx_qlvl_handler() local
506 chn = tmp & 0xF; in usbh_rx_qlvl_handler()
509 ch = USB_CHL(usbx, chn); in usbh_rx_qlvl_handler()
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/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_clc_drv.h200 clc->VDVQ_CHAN[chn].ADC_CHAN = adc_chn; in clc_set_adc_chn_offset()
201 clc->VDVQ_CHAN[chn].ADC_OFFSET = adc_offset; in clc_set_adc_chn_offset()
212 clc->VDVQ_CHAN[chn].PWM_PERIOD = pwm_period; in clc_set_pwm_period()
223 return clc->VDVQ_CHAN[chn].PWM_PERIOD; in clc_get_pwm_period()
234 return clc->VDVQ_CHAN[chn].OUTPUT_VALUE; in clc_get_output_value()
245 return clc->VDVQ_CHAN[chn].TIMESTAMP; in clc_get_timestamp()
256 return (int32_t)clc->VDVQ_CHAN[chn].EADC_CURR; in clc_get_eadc_current_value()
267 return (int32_t)clc->VDVQ_CHAN[chn].EADC_PRE0; in clc_get_eadc_previous0_value()
289 return (int32_t)clc->VDVQ_CHAN[chn].EADC_PRE1; in clc_get_eadc_previous1_value()
311 return (int32_t)clc->VDVQ_CHAN[chn].P2Z2_CURR; in clc_get_2p2z_current_value()
[all …]
A Dhpm_pwmv2_drv.h395 …pwm_x->PWM[chn].CFG0 = (pwm_x->PWM[chn].CFG0 & ~PWMV2_PWM_CFG0_FAULT_SEL_ASYNC_MASK) | PWMV2_PWM_C… in pwmv2_fault_signal_select_from_pad()
407 …pwm_x->PWM[chn].CFG0 = (pwm_x->PWM[chn].CFG0 & ~PWMV2_PWM_CFG0_FAULT_POL_ASYNC_MASK) | PWMV2_PWM_C… in pwmv2_fault_signal_polarity()
544 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FAULT_MODE_MASK) | PWMV2_PWM_CFG1_F… in pwmv2_set_fault_mode()
556 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FAULT_REC_TIME_MASK) | PWMV2_PWM_CF… in pwmv2_set_fault_recovery_time()
623 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_PWM_LOGIC_MASK) | PWMV2_PWM_CFG1_PW… in pwmv2_set_four_cmp_logic()
635 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FORCE_TIME_MASK) | PWMV2_PWM_CFG1_F… in pwmv2_set_force_update_time()
659 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FORCE_ACT_SEL_MASK) | PWMV2_PWM_CFG… in pwmv2_trig_force_hardware_or_software_select_trigmux_index()
671 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_PWM_FORCE_SEL_MASK) | PWMV2_PWM_CFG… in pwmv2_select_force_trigmux_index()
683 …pwm_x->PWM[chn].CFG1 = (pwm_x->PWM[chn].CFG1 & ~PWMV2_PWM_CFG1_FAULT_REC_SEL_MASK) | PWMV2_PWM_CFG… in pwmv2_select_recovery_fault_trigmux_index()
932 pwm_x->CAPTURE_POS[chn] = (pwm_x->CAPTURE_POS[chn] & ~PWMV2_CAPTURE_POS_CAPTURE_SELGPIO_MASK) | in pwmv2_capture_selection_input_source()
[all …]
A Dhpm_pla_drv.h118 pla_channel_type_t chn; /**< pla channel */ member
167 pla_channel_type_t chn; /**< pla channel */ member
309 pla->CHN[chn].AOI_16TO8[aoi_16to8_chn] = pla->CHN[chn].AOI_16TO8[aoi_16to8_chn] & in pla_set_aoi_16to8_input_signal()
448 pla->CHN[chn].FILTER_2ND[filter2_chn] = cfg->val; in pla_set_filter2()
464 cfg->val = pla->CHN[chn].FILTER_2ND[filter2_chn]; in pla_get_filter2()
480 pla->CHN[chn].FILTER_3RD[filter3_chn] = cfg->val; in pla_set_filter3()
496 cfg->val = pla->CHN[chn].FILTER_3RD[filter3_chn]; in pla_get_filter3()
507 pla_channel_type_t chn, in pla_set_ff() argument
510 pla->CHN[chn].CFG_FF = cfg->val; in pla_set_ff()
524 cfg->val = pla->CHN[chn].CFG_FF; in pla_get_ff()
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A Dhpm_plb_drv.h202 static inline void plb_type_a_set_lut(PLB_Type *plb, plb_chn_t chn, plb_type_a_lut_num_t lut_num, p… in plb_type_a_set_lut() argument
204 plb->TYPE_A[chn].LOOKUP_TABLE[lut_num] = PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_SET(truth->val); in plb_type_a_set_lut()
214 static inline void plb_type_a_inject_by_sw(PLB_Type *plb, plb_chn_t chn, uint8_t inject_val) in plb_type_a_inject_by_sw() argument
216 plb->TYPE_A[chn].SW_INJECT = PLB_TYPE_A_SW_INJECT_SW_INJECT_SET(inject_val); in plb_type_a_inject_by_sw()
227 static inline void plb_type_b_set_cmp_val(PLB_Type *plb, plb_chn_t chn, plb_type_b_cmp_t cmp_index,… in plb_type_b_set_cmp_val() argument
229 plb->TYPE_B[chn].CMP[cmp_index] = PLB_TYPE_B_CMP_CMP_VALUE_SET(val); in plb_type_b_set_cmp_val()
240 static inline void plb_type_b_set_cmp_mode(PLB_Type *plb, plb_chn_t chn, plb_type_b_cmp_t cmp_index… in plb_type_b_set_cmp_mode() argument
242 …plb->TYPE_B[chn].MODE = (plb->TYPE_B[chn].MODE & (~(PLB_TYPE_B_MODE_OUT0_SEL_MASK << (cmp_index <<… in plb_type_b_set_cmp_mode()
253 static inline void plb_type_b_inject_by_sw(PLB_Type *plb, plb_chn_t chn, uint32_t val) in plb_type_b_inject_by_sw() argument
255 plb->TYPE_B[chn].SW_INJECT = val; in plb_type_b_inject_by_sw()
[all …]
/bsp/synwit/libraries/SWM320_CSL/SWM320_StdPeriph_Driver/
A DSWM320_dma.c43 DMA->CH[chn].SRC = src_addr; in DMA_CHM_Config()
44 DMA->CH[chn].DST = dst_addr; in DMA_CHM_Config()
54 DMA->IE |= (1 << chn); in DMA_CHM_Config()
75 void DMA_CH_Open(uint32_t chn) in DMA_CH_Open() argument
87 void DMA_CH_Close(uint32_t chn) in DMA_CH_Close() argument
99 void DMA_CH_INTEn(uint32_t chn) in DMA_CH_INTEn() argument
101 DMA->IM &= ~(1 << chn); in DMA_CH_INTEn()
111 void DMA_CH_INTDis(uint32_t chn) in DMA_CH_INTDis() argument
113 DMA->IM |= (1 << chn); in DMA_CH_INTDis()
123 void DMA_CH_INTClr(uint32_t chn) in DMA_CH_INTClr() argument
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A DSWM320_pwm.c191 if(chn == PWM_CH_A) in PWM_SetCycle()
193 else if(chn == PWM_CH_B) in PWM_SetCycle()
209 if(chn == PWM_CH_A) in PWM_GetCycle()
211 else if(chn == PWM_CH_B) in PWM_GetCycle()
228 if(chn == PWM_CH_A) in PWM_SetHDuty()
230 else if(chn == PWM_CH_B) in PWM_SetHDuty()
246 if(chn == PWM_CH_A) in PWM_GetHDuty()
248 else if(chn == PWM_CH_B) in PWM_GetHDuty()
265 if(chn == PWM_CH_A) in PWM_SetDeadzone()
267 else if(chn == PWM_CH_B) in PWM_SetDeadzone()
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A DSWM320_adc.h58 void ADC_IntEOCEn(ADC_TypeDef * ADCx, uint32_t chn); //转换完成中断使能
59 void ADC_IntEOCDis(ADC_TypeDef * ADCx, uint32_t chn); //转换完成中断禁止
60 void ADC_IntEOCClr(ADC_TypeDef * ADCx, uint32_t chn); //转换完成中断标志清除
61 uint32_t ADC_IntEOCStat(ADC_TypeDef * ADCx, uint32_t chn); //转换完成中断状态
63 void ADC_IntOVFEn(ADC_TypeDef * ADCx, uint32_t chn); //数据溢出中断使能
64 void ADC_IntOVFDis(ADC_TypeDef * ADCx, uint32_t chn); //数据溢出中断禁止
65 void ADC_IntOVFClr(ADC_TypeDef * ADCx, uint32_t chn); //数据溢出中断标志清除
66 uint32_t ADC_IntOVFStat(ADC_TypeDef * ADCx, uint32_t chn); //数据溢出中断状态
73 void ADC_IntFULLEn(ADC_TypeDef * ADCx, uint32_t chn); //FIFO满中断使能
74 void ADC_IntFULLDis(ADC_TypeDef * ADCx, uint32_t chn); //FIFO满中断禁止
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A DSWM320_adc.c207 switch(chn) in chn2idx()
233 uint32_t idx = chn2idx(chn); in ADC_Read()
252 uint32_t idx = chn2idx(chn); in ADC_IsEOC()
282 uint32_t idx = chn2idx(chn); in ADC_IntEOCEn()
297 uint32_t idx = chn2idx(chn); in ADC_IntEOCDis()
312 uint32_t idx = chn2idx(chn); in ADC_IntEOCClr()
327 uint32_t idx = chn2idx(chn); in ADC_IntEOCStat()
342 uint32_t idx = chn2idx(chn); in ADC_IntOVFEn()
357 uint32_t idx = chn2idx(chn); in ADC_IntOVFDis()
372 uint32_t idx = chn2idx(chn); in ADC_IntOVFClr()
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A DSWM320_pwm.h41 void PWM_SetCycle(PWM_TypeDef * PWMx, uint32_t chn, uint16_t cycle); //设置周期
42 uint16_t PWM_GetCycle(PWM_TypeDef * PWMx, uint32_t chn); //获取周期
43 void PWM_SetHDuty(PWM_TypeDef * PWMx, uint32_t chn, uint16_t hduty); //设置高电平时长
44 uint16_t PWM_GetHDuty(PWM_TypeDef * PWMx, uint32_t chn); //获取高电平时长
45 void PWM_SetDeadzone(PWM_TypeDef * PWMx, uint32_t chn, uint8_t deadzone); //设置死区时长
46 uint8_t PWM_GetDeadzone(PWM_TypeDef * PWMx, uint32_t chn); //获取死区时长
48 void PWM_IntNCycleEn(PWM_TypeDef * PWMx, uint32_t chn); //新周期开始中断使能
49 void PWM_IntNCycleDis(PWM_TypeDef * PWMx, uint32_t chn); //新周期开始中断禁能
50 void PWM_IntNCycleClr(PWM_TypeDef * PWMx, uint32_t chn); //新周期开始中断标志清除
52 void PWM_IntHEndEn(PWM_TypeDef * PWMx, uint32_t chn); //高电平结束中断使能
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A DSWM320_dma.h10 void DMA_CHM_Config(uint32_t chn, uint32_t src_addr, uint32_t src_addr_incr, uint32_t dst_addr, uin…
11 void DMA_CH_Open(uint32_t chn); //DMA通道打开
12 void DMA_CH_Close(uint32_t chn); //DMA通道关闭
14 void DMA_CH_INTEn(uint32_t chn); //DMA中断使能，数据搬运完成后触发中断
15 void DMA_CH_INTDis(uint32_t chn); //DMA中断禁止，数据搬运完成后不触发中断
16 void DMA_CH_INTClr(uint32_t chn); //DMA中断标志清除
17 uint32_t DMA_CH_INTStat(uint32_t chn); //DMA中断状态查询，1 数据搬运完成 0 数据搬运未完成
/bsp/ck802/libraries/common/pwm/
A Dck_pwm.c118 if (chn == CKENUM_PWM_CH0 || chn == CKENUM_PWM_CH1) { in drv_pwm_config()
137 if (chn == CKENUM_PWM_CH2 || chn == CKENUM_PWM_CH3) { in drv_pwm_config()
156 if (chn == CKENUM_PWM_CH4 || chn == CKENUM_PWM_CH5) { in drv_pwm_config()
175 if (chn == CKENUM_PWM_CH6 || chn == CKENUM_PWM_CH7) { in drv_pwm_config()
194 if (chn == CKENUM_PWM_CH8 || chn == CKENUM_PWM_CH9) { in drv_pwm_config()
249 if (chn == CKENUM_PWM_CH0 || chn == CKENUM_PWM_CH1) { in drv_pwm_start()
253 if (chn == CKENUM_PWM_CH2 || chn == CKENUM_PWM_CH3) { in drv_pwm_start()
257 if (chn == CKENUM_PWM_CH4 || chn == CKENUM_PWM_CH5) { in drv_pwm_start()
261 if (chn == CKENUM_PWM_CH6 || chn == CKENUM_PWM_CH7) { in drv_pwm_start()
265 if (chn == CKENUM_PWM_CH8 || chn == CKENUM_PWM_CH9) { in drv_pwm_start()
[all …]
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_pla_drv.c49 … pla->CHN[cfg->chn].AOI_8TO7_00_01 = (pla->CHN[cfg->chn].AOI_8TO7_00_01 & 0xffff0000) | value; in pla_set_aoi_8to7_one_channel()
52 …pla->CHN[cfg->chn].AOI_8TO7_00_01 = (pla->CHN[cfg->chn].AOI_8TO7_00_01 & 0x0000ffff) | (value << 1… in pla_set_aoi_8to7_one_channel()
55 … pla->CHN[cfg->chn].AOI_8TO7_02_03 = (pla->CHN[cfg->chn].AOI_8TO7_02_03 & 0xffff0000) | value; in pla_set_aoi_8to7_one_channel()
58 …pla->CHN[cfg->chn].AOI_8TO7_02_03 = (pla->CHN[cfg->chn].AOI_8TO7_02_03 & 0x0000ffff) | (value << 1… in pla_set_aoi_8to7_one_channel()
61 … pla->CHN[cfg->chn].AOI_8TO7_04_05 = (pla->CHN[cfg->chn].AOI_8TO7_04_05 & 0xffff0000) | value; in pla_set_aoi_8to7_one_channel()
137 pla->CHN[chn].AOI_8TO7_00_01 = (pla->CHN[chn].AOI_8TO7_00_01 & 0xffff0000) | value; in pla_set_aoi_8to7_input_signal()
140 pla->CHN[chn].AOI_8TO7_00_01 = (pla->CHN[chn].AOI_8TO7_00_01 & 0x0000ffff) | (value << 16); in pla_set_aoi_8to7_input_signal()
143 pla->CHN[chn].AOI_8TO7_02_03 = (pla->CHN[chn].AOI_8TO7_02_03 & 0xffff0000) | value; in pla_set_aoi_8to7_input_signal()
146 pla->CHN[chn].AOI_8TO7_02_03 = (pla->CHN[chn].AOI_8TO7_02_03 & 0x0000ffff) | (value << 16); in pla_set_aoi_8to7_input_signal()
149 pla->CHN[chn].AOI_8TO7_04_05 = (pla->CHN[chn].AOI_8TO7_04_05 & 0xffff0000) | value; in pla_set_aoi_8to7_input_signal()
[all …]
A Dhpm_clc_drv.c11 void clc_config_param(CLC_Type *clc, clc_chn_t chn, clc_param_config_t *param) in clc_config_param() argument
13 clc->VDVQ_CHAN[chn].EADC_LOWTH = (uint32_t)param->eadc_lowth; in clc_config_param()
14 clc->VDVQ_CHAN[chn].EADC_HIGHTH = (uint32_t)param->eadc_highth; in clc_config_param()
15 clc->VDVQ_CHAN[chn].EADC_MIDLOWTH = (uint32_t)param->eadc_mid_lowth; in clc_config_param()
16 clc->VDVQ_CHAN[chn].EADC_MIDHIGHTH = (uint32_t)param->eadc_mid_highth; in clc_config_param()
17 clc->VDVQ_CHAN[chn].P2Z2_CLAMP_LO = (uint32_t)param->_2p2z_clamp_lowth; in clc_config_param()
18 clc->VDVQ_CHAN[chn].P2Z2_CLAMP_HI = (uint32_t)param->_2p2z_clamp_highth; in clc_config_param()
19 clc->VDVQ_CHAN[chn].P3Z3_CLAMP_LO = (uint32_t)param->_3p3z_clamp_lowth; in clc_config_param()
20 clc->VDVQ_CHAN[chn].P3Z3_CLAMP_HI = (uint32_t)param->_3p3z_clamp_highth; in clc_config_param()
22 clc->VDVQ_CHAN[chn].P3Z3_FORBID_MD = (uint32_t)param->output_forbid_mid; in clc_config_param()
[all …]
A Dhpm_plb_drv.c11 void plb_type_b_set_lut(PLB_Type *plb, plb_chn_t chn, plb_type_b_lut_slice_t slice, plb_type_b_slic… in plb_type_b_set_lut() argument
15 plb->TYPE_B[chn].MODE |= PLB_TYPE_B_MODE_OPT_SEL_SET(1); in plb_type_b_set_lut()
17 plb->TYPE_B[chn].MODE &= ~PLB_TYPE_B_MODE_OPT_SEL_MASK; in plb_type_b_set_lut()
20 …plb->TYPE_B[chn].LUT[1] = (plb->TYPE_B[chn].LUT[1] & (~PLB_TYPE_B_LUT_LOOKUP_TABLE_SET(PLB_SLICE_H… in plb_type_b_set_lut()
22 …plb->TYPE_B[chn].LUT[0] = (plb->TYPE_B[chn].LUT[0] & (~PLB_TYPE_B_LUT_LOOKUP_TABLE_SET(PLB_SLICE_L… in plb_type_b_set_lut()
A Dhpm_rdc_drv.c63 uint32_t rdc_get_acc_avl(RDC_Type *ptr, rdc_input_acc_chn_t chn) in rdc_get_acc_avl() argument
65 if (chn == rdc_acc_chn_i) { in rdc_get_acc_avl()
74 if (chn == trigger_out_0) { in rdc_output_trig_offset_config()
77 } else if (chn == trigger_out_1) { in rdc_output_trig_offset_config()
83 void rdc_output_trig_enable(RDC_Type *ptr, rdc_output_trig_chn_t chn) in rdc_output_trig_enable() argument
85 if (chn == trigger_out_0) { in rdc_output_trig_enable()
87 } else if (chn == trigger_out_1) { in rdc_output_trig_enable()
94 if (chn == trigger_out_0) { in rdc_output_trig_disable()
96 } else if (chn == trigger_out_1) { in rdc_output_trig_disable()
152 if (chn == rdc_acc_chn_i) { in rdc_set_edge_detection_offset()
[all …]
/bsp/k210/drivers/
A Ddmalock.c41 int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name) in _dmalock_sync_take() argument
45 *chn = DMAC_CHANNEL_MAX; in _dmalock_sync_take()
56 *chn = i; in _dmalock_sync_take()
65 void dmalock_release(dmac_channel_number_t chn) in dmalock_release() argument
67 if (chn >= DMAC_CHANNEL_MAX) in dmalock_release()
69 _dmac_host.channel_name[chn] = NULL; in dmalock_release()
70 _dmac_host.channel_used[chn] = 0; in dmalock_release()
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_tsc.c155 uint32_t i,chn,timeout,*pReg,nPos; in TSC_ConfigInternalResistor() local
183 if (chn & 0x00000001) in TSC_ConfigInternalResistor()
191 chn >>= 1; in TSC_ConfigInternalResistor()
209 uint32_t i, chn,timeout,*pReg; in TSC_ConfigThreshold() local
235 chn = Channels & TSC_CHNEN_CHN_SEL_MASK; in TSC_ConfigThreshold()
240 if (chn & 0x00000001) in TSC_ConfigThreshold()
245 chn >>= 1; in TSC_ConfigThreshold()
263 uint32_t i,chn, *pReg; in TSC_GetChannelCfg() local
272 chn = Channels & TSC_CHNEN_CHN_SEL_MASK; in TSC_GetChannelCfg()
276 if (chn & 0x00000001) in TSC_GetChannelCfg()
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_tsc.c155 uint32_t i,chn,timeout,*pReg,nPos; in TSC_ConfigInternalResistor() local
183 if (chn & 0x00000001) in TSC_ConfigInternalResistor()
191 chn >>= 1; in TSC_ConfigInternalResistor()
209 uint32_t i, chn,timeout,*pReg; in TSC_ConfigThreshold() local
235 chn = Channels & TSC_CHNEN_CHN_SEL_MASK; in TSC_ConfigThreshold()
240 if (chn & 0x00000001) in TSC_ConfigThreshold()
245 chn >>= 1; in TSC_ConfigThreshold()
263 uint32_t i,chn, *pReg; in TSC_GetChannelCfg() local
272 chn = Channels & TSC_CHNEN_CHN_SEL_MASK; in TSC_GetChannelCfg()
276 if (chn & 0x00000001) in TSC_GetChannelCfg()
[all …]
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_tsc.c155 uint32_t i,chn,timeout,*pReg,nPos; in TSC_ConfigInternalResistor() local
183 if (chn & 0x00000001) in TSC_ConfigInternalResistor()
191 chn >>= 1; in TSC_ConfigInternalResistor()
209 uint32_t i, chn,timeout,*pReg; in TSC_ConfigThreshold() local
235 chn = Channels & TSC_CHNEN_CHN_SEL_MASK; in TSC_ConfigThreshold()
240 if (chn & 0x00000001) in TSC_ConfigThreshold()
245 chn >>= 1; in TSC_ConfigThreshold()
263 uint32_t i,chn, *pReg; in TSC_GetChannelCfg() local
272 chn = Channels & TSC_CHNEN_CHN_SEL_MASK; in TSC_GetChannelCfg()
276 if (chn & 0x00000001) in TSC_GetChannelCfg()
[all …]
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_tsc.c165 uint32_t i,chn,timeout,nReg,nPos; in TSC_ConfigInternalResistor() local
185 chn = Channels & TSC_CHNEN_CHN_SELx_Msk; in TSC_ConfigInternalResistor()
190 if (chn & 0x00000001) in TSC_ConfigInternalResistor()
197 chn >>= 1; in TSC_ConfigInternalResistor()
214 uint32_t i, chn,timeout; in TSC_ConfigThreshold() local
234 chn = Channels & TSC_CHNEN_CHN_SELx_Msk; in TSC_ConfigThreshold()
239 if (chn & 0x00000001) in TSC_ConfigThreshold()
244 chn >>= 1; in TSC_ConfigThreshold()
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_tsc.c165 uint32_t i,chn,timeout,nReg,nPos; in TSC_ConfigInternalResistor() local
185 chn = Channels & TSC_CHNEN_CHN_SELx_Msk; in TSC_ConfigInternalResistor()
190 if (chn & 0x00000001) in TSC_ConfigInternalResistor()
197 chn >>= 1; in TSC_ConfigInternalResistor()
214 uint32_t i, chn,timeout; in TSC_ConfigThreshold() local
234 chn = Channels & TSC_CHNEN_CHN_SELx_Msk; in TSC_ConfigThreshold()
239 if (chn & 0x00000001) in TSC_ConfigThreshold()
244 chn >>= 1; in TSC_ConfigThreshold()

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