Home
last modified time | relevance | path

Searched refs:clk_parent (Results 1 – 9 of 9) sorted by relevance

/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/soc/
A Dplatform_resource.c54 g_clk_no[i].clk_parent = hal_clock_get(HAL_SUNXI_CCU, g_clk_no[i].clk_parent_id); in plat_get_clk()
93 *clk = g_clk_no[i].clk_parent; in plat_get_clk_from_id()
A Dplatform_resource.h39 hal_clk_t clk_parent; member
/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/de/
A Ddisp_tv.h35 struct clk *clk_parent; member
A Ddisp_vdevice.c29 struct clk *clk_parent; member
56 vdevicep->clk_parent = clk_get_parent(vdevicep->clk); in vdevice_clk_init()
105 clk_set_rate(vdevicep->clk_parent, pll_rate); in vdevice_clk_config()
108 pll_rate_set = clk_get_rate(vdevicep->clk_parent); in vdevice_clk_config()
A Ddisp_manager.c33 u32 clk_parent; member
848 mgrp->clk_parent = (disp_clk_t)disp_sys_clk_get_parent(mgrp->clk); in disp_mgr_clk_init()
880 disp_sys_clk_set_parent(mgrp->clk, mgrp->clk_parent); in disp_mgr_clk_enable()
888 if (mgrp->clk_parent) in disp_mgr_clk_enable()
889 disp_sys_clk_set_rate(mgrp->clk_parent, de_freq); in disp_mgr_clk_enable()
A Ddisp_lcd.c57 disp_clk_t clk_parent; member
515 lcdp->clk_parent = (disp_clk_t)disp_sys_clk_get_parent(lcdp->clk_tcon_lcd); in lcd_clk_init()
629 if (lcdp->clk_parent) { in lcd_clk_config()
630 disp_sys_clk_set_rate((u32) lcdp->clk_parent, (u32) pll_rate); in lcd_clk_config()
631 pll_rate_set = disp_sys_clk_get_rate((u32) lcdp->clk_parent); in lcd_clk_config()
632 disp_sys_clk_set_parent(lcdp->clk_tcon_lcd, lcdp->clk_parent); in lcd_clk_config()
A Ddisp_tv.c83 ptvp->clk_parent = clk_get_parent(ptvp->clk); in tv_clk_init()
/bsp/allwinner/libraries/sunxi-hal/hal/source/g2d_rcq/
A Dg2d.c390 info->clk_parent= hal_clock_get(clk_type,SUNXI_G2D_CLK_PARENT); in g2d_clk_init()
398 ret = hal_clk_set_parent(info->clk[0], info->clk_parent); in g2d_clk_init()
400 G2D_ERR_MSG("set clk:%d's parent:%d fail!\n", info->clk, info->clk_parent); in g2d_clk_init()
428 ret = hal_clock_enable(info->clk_parent); in g2d_clock_enable()
A Dg2d_driver_i.h65 hal_clk_t clk_parent; member

Completed in 28 milliseconds