Searched refs:clk_source (Results 1 – 8 of 8) sorted by relevance
29 if (config->clk_source == BFLB_SYSTEM_XCLK) { in bflb_pwm_v1_channel_init()31 } else if (config->clk_source == BFLB_SYSTEM_PBCLK) { in bflb_pwm_v1_channel_init()33 } else if (config->clk_source == BFLB_SYSTEM_32K_CLK) { in bflb_pwm_v1_channel_init()
29 if (config->clk_source == BFLB_SYSTEM_XCLK) { in bflb_pwm_v2_init()31 } else if (config->clk_source == BFLB_SYSTEM_PBCLK) { in bflb_pwm_v2_init()33 } else if (config->clk_source == BFLB_SYSTEM_32K_CLK) { in bflb_pwm_v2_init()
895 const enum system_clock_source clk_source);898 const enum system_clock_source clk_source);901 const enum system_clock_source clk_source);
897 const enum system_clock_source clk_source);900 const enum system_clock_source clk_source);903 const enum system_clock_source clk_source);
80 uint8_t clk_source; member
157 uint8_t clk_source; member
29 pwm_config.clk_source = BFLB_SYSTEM_XCLK; in _pwm_set()
232 uint8_t clk_source; /*!< clock source */ member
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