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Searched refs:clkdiv (Results 1 – 20 of 20) sorted by relevance

/bsp/efm32/Libraries/emlib/src/
A Dem_usart.c126 uint32_t clkdiv; in USART_BaudrateAsyncSet() local
196 clkdiv -= 4; in USART_BaudrateAsyncSet()
197 clkdiv *= 64; in USART_BaudrateAsyncSet()
201 usart->CLKDIV = clkdiv; in USART_BaudrateAsyncSet()
413 uint32_t clkdiv; in USART_BaudrateSyncSet() local
451 clkdiv = 2 * refFreq; in USART_BaudrateSyncSet()
452 clkdiv += baudrate - 1; in USART_BaudrateSyncSet()
453 clkdiv /= baudrate; in USART_BaudrateSyncSet()
454 clkdiv -= 4; in USART_BaudrateSyncSet()
455 clkdiv *= 64; in USART_BaudrateSyncSet()
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A Dem_leuart.c127 uint32_t LEUART_BaudrateCalc(uint32_t refFreq, uint32_t clkdiv) in LEUART_BaudrateCalc() argument
135 clkdiv &= _LEUART_CLKDIV_MASK; in LEUART_BaudrateCalc()
174 divisor = 256 + clkdiv; in LEUART_BaudrateCalc()
258 uint32_t clkdiv; in LEUART_BaudrateSet() local
314 clkdiv = (32 * refFreq) / baudrate; in LEUART_BaudrateSet()
315 clkdiv -= 32; in LEUART_BaudrateSet()
316 clkdiv *= 8; in LEUART_BaudrateSet()
321 leuart->CLKDIV = clkdiv; in LEUART_BaudrateSet()
/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/
A Ddrv_pwm.c112 uint16_t prescale, period, clkdiv, pulse; in gd32_pwm_get() local
120 clkdiv = 1 << clkdiv; in gd32_pwm_get()
124 pwmclk = pwmclk / prescale / clkdiv; in gd32_pwm_get()
138 uint16_t prescale, period, clkdiv, pulse; in gd32_pwm_set() local
173 clkdiv = TIMER_CKDIV_DIV1; in gd32_pwm_set()
180 clkdiv = TIMER_CKDIV_DIV1; in gd32_pwm_set()
186 clkdiv = TIMER_CKDIV_DIV2; in gd32_pwm_set()
192 clkdiv = TIMER_CKDIV_DIV4; in gd32_pwm_set()
195 pwmclkv2 = pwmclk / (prescale + 1) / (1 << clkdiv); in gd32_pwm_set()
202 pwmclk, (uint32_t)period_cmp, prescale, period, pulse, clkdiv); in gd32_pwm_set()
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/bsp/bluetrum/libraries/hal_libraries/bmsis/source/
A Dsystem_ab32vgx.c210 uint32_t clkdiv; in set_peripherals_clkdiv() local
232 clkdiv = 2; in set_peripherals_clkdiv()
234 clkdiv = 1; in set_peripherals_clkdiv()
236 clkdiv = 0; in set_peripherals_clkdiv()
238 clkcon3 |= clkdiv; //aec clk = sys_clk / (n+1) in set_peripherals_clkdiv()
239 clkcon3 |= (clkdiv << 19); //plc clk = sys_clk / (n+1) in set_peripherals_clkdiv()
240 clkcon3 |= (clkdiv << 23); //cvsd clk = sys_clk / (n+1) in set_peripherals_clkdiv()
245 clkdiv = 2; in set_peripherals_clkdiv()
247 clkdiv = 1; in set_peripherals_clkdiv()
249 clkdiv = 0; in set_peripherals_clkdiv()
[all …]
/bsp/w60x/drivers/
A Ddrv_pwm.c54 pwm_param.clkdiv = psc; in wm_pwm_set()
93 uint32_t clkdiv; in wm_pwm_get() local
98 tls_pwm_get_info(channel, &clkdiv, &duty, &period); in wm_pwm_get()
100 configuration->period = (period + 1) * clkdiv * 1000UL / sysclk.apbclk; in wm_pwm_get()
101 configuration->pulse = (duty + 1) * clkdiv * 1000UL / sysclk.apbclk; in wm_pwm_get()
/bsp/synwit/libraries/SWM320_CSL/SWM320_StdPeriph_Driver/
A DSWM320_sdio.c585 uint32_t clkdiv = (SystemCoreClock / (1 << prediv)) / freq; in calcSDCLKDiv() local
588 if(clkdiv > 128) regdiv = 0x80; in calcSDCLKDiv()
589 else if(clkdiv > 64) regdiv = 0x40; in calcSDCLKDiv()
590 else if(clkdiv > 32) regdiv = 0x20; in calcSDCLKDiv()
591 else if(clkdiv > 16) regdiv = 0x10; in calcSDCLKDiv()
592 else if(clkdiv > 8) regdiv = 0x08; in calcSDCLKDiv()
593 else if(clkdiv > 4) regdiv = 0x04; in calcSDCLKDiv()
594 else if(clkdiv > 2) regdiv = 0x02; in calcSDCLKDiv()
595 else if(clkdiv > 1) regdiv = 0x01; in calcSDCLKDiv()
/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_sdio.c592 uint32_t clkdiv = (SystemCoreClock / (1 << prediv)) / freq; in calcSDCLKDiv() local
595 if(clkdiv > 128) regdiv = 0x80; in calcSDCLKDiv()
596 else if(clkdiv > 64) regdiv = 0x40; in calcSDCLKDiv()
597 else if(clkdiv > 32) regdiv = 0x20; in calcSDCLKDiv()
598 else if(clkdiv > 16) regdiv = 0x10; in calcSDCLKDiv()
599 else if(clkdiv > 8) regdiv = 0x08; in calcSDCLKDiv()
600 else if(clkdiv > 4) regdiv = 0x04; in calcSDCLKDiv()
601 else if(clkdiv > 2) regdiv = 0x02; in calcSDCLKDiv()
602 else if(clkdiv > 1) regdiv = 0x01; in calcSDCLKDiv()
/bsp/at91/at91sam9260/drivers/
A Dat91_mci.c723 rt_uint32_t clkdiv; in at91_mci_set_iocfg() local
731 clkdiv = 0; in at91_mci_set_iocfg()
739 clkdiv = ((at91_master_clock / io_cfg->clock) / 2) - 1; in at91_mci_set_iocfg()
741 clkdiv = (at91_master_clock / io_cfg->clock) / 2; in at91_mci_set_iocfg()
743 mci_dbg("clkdiv = %d. mcck = %ld\n", clkdiv, in at91_mci_set_iocfg()
744 at91_master_clock / (2 * (clkdiv + 1))); in at91_mci_set_iocfg()
758 at91_mci_write(AT91_MCI_MR, (at91_mci_read(AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); in at91_mci_set_iocfg()
/bsp/at91/at91sam9g45/drivers/
A Dat91_mci.c723 rt_uint32_t clkdiv; in at91_mci_set_iocfg() local
731 clkdiv = 0; in at91_mci_set_iocfg()
739 clkdiv = ((at91_master_clock / io_cfg->clock) / 2) - 1; in at91_mci_set_iocfg()
741 clkdiv = (at91_master_clock / io_cfg->clock) / 2; in at91_mci_set_iocfg()
743 mci_dbg("clkdiv = %d. mcck = %ld\n", clkdiv, in at91_mci_set_iocfg()
744 at91_master_clock / (2 * (clkdiv + 1))); in at91_mci_set_iocfg()
758 at91_mci_write(AT91C_MCI_MR, (at91_mci_read(AT91C_MCI_MR) & ~AT91C_MCI_CLKDIV) | clkdiv); in at91_mci_set_iocfg()
/bsp/at32/libraries/rt_drivers/
A Ddrv_sdram.c155 sdram_init_struct.clkdiv = XMC_CLKDIV_2; in sdram_init()
157 sdram_init_struct.clkdiv = XMC_CLKDIV_3; in sdram_init()
/bsp/core-v-mcu/Libraries/core_v_hal_libraries/core_v_hal/include/
A Dhal_uart_periph.h147 uint32_t clkdiv:16; member
/bsp/efm32/Libraries/emlib/inc/
A Dem_leuart.h144 uint32_t LEUART_BaudrateCalc(uint32_t refFreq, uint32_t clkdiv);
A Dem_usart.h489 uint32_t clkdiv,
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_sdio.c170 void SDIO_Clock_Set(u8 clkdiv) in SDIO_Clock_Set() argument
173 … (clkdiv) ? (SDIO->MMC_CTRL |= SDIO_MMC_CTRL_SelPTSM) : (SDIO->MMC_CTRL &= ~SDIO_MMC_CTRL_SelPTSM); in SDIO_Clock_Set()
/bsp/maxim/libraries/MAX32660PeriphDriver/CMSIS/Device/Maxim/MAX32660/Include/
A Dflc_regs.h90 __IO uint32_t clkdiv; /**< <tt>\b 0x04:</tt> FLC CLKDIV Register */ member
/bsp/maxim/libraries/MAX32660PeriphDriver/Source/
A Dflc.c66 MXC_FLC->clkdiv = SystemCoreClock / 1000000; in prepare_flc()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Inc/
A Dhal_sdio.h471 void SDIO_Clock_Set(u8 clkdiv);
/bsp/gd32/arm/libraries/gd32_drivers/
A Ddrv_sdio.c1553 uint32_t count = 0, clkdiv = 0; in sd_erase() local
1568 clkdiv = (SDIO_CLKCTL & SDIO_CLKCTL_DIV); in sd_erase()
1569 clkdiv += ((SDIO_CLKCTL & SDIO_CLKCTL_DIV8)>>31)*256; in sd_erase()
1570 clkdiv += 2; in sd_erase()
1571 delay = 168000 / clkdiv; in sd_erase()
/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Include/
A Dald_qspi.h191 qspi_clk_div_t clkdiv; /**< QSPI Baud Rate Clock Prescaler*/ member
/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/
A Dald_qspi.c108 assert_param(IS_QSPI_CLOCK_PRESCALER(hperh->init.clkdiv)); in ald_qspi_init()
113 … QSPI_CR_PSL_MSK | QSPI_CR_SWPP_MSK , (hperh->init.clkdiv << QSPI_CR_BAUD_POSS) | \ in ald_qspi_init()

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