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/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/
A Dsystem_fm33lc0xx.c53 uint32_t clock = 0; in SystemPLLClockUpdate() local
85 clock /= 1; in SystemPLLClockUpdate()
89 clock /= 2; in SystemPLLClockUpdate()
93 clock /= 4; in SystemPLLClockUpdate()
97 clock /= 8; in SystemPLLClockUpdate()
101 clock /= 12; in SystemPLLClockUpdate()
105 clock /= 16; in SystemPLLClockUpdate()
109 clock /= 24; in SystemPLLClockUpdate()
118 clock = clock * (((RCC->PLLCR >> 16) & 0x7F) + 1); in SystemPLLClockUpdate()
123 clock *= 2; in SystemPLLClockUpdate()
[all …]
/bsp/hc32/ev_hc32f472_lqfp100/board/config/
A Di2c_config.h28 .clock = FCG1_PERIPH_I2C1, \
41 .clock = I2C1_TX_DMA_CLOCK, \
59 .clock = I2C1_RX_DMA_CLOCK, \
79 .clock = FCG1_PERIPH_I2C2, \
91 .clock = I2C2_TX_DMA_CLOCK, \
109 .clock = I2C2_RX_DMA_CLOCK, \
130 .clock = FCG1_PERIPH_I2C3, \
142 .clock = I2C3_TX_DMA_CLOCK, \
160 .clock = I2C3_RX_DMA_CLOCK, \
181 .clock = FCG1_PERIPH_I2C4, \
[all …]
A Duart_config.h29 .clock = FCG3_PERIPH_USART1, \
43 .clock = UART1_RX_DMA_CLOCK, \
61 .clock = FCG2_PERIPH_TMR0_1, \
99 .clock = UART1_TX_DMA_CLOCK, \
120 .clock = FCG3_PERIPH_USART2, \
134 .clock = UART2_RX_DMA_CLOCK, \
152 .clock = FCG2_PERIPH_TMR0_1, \
190 .clock = UART2_TX_DMA_CLOCK, \
211 .clock = FCG3_PERIPH_USART3, \
240 .clock = FCG3_PERIPH_USART4, \
[all …]
A Dspi_config.h29 .clock = FCG1_PERIPH_SPI1, \
47 .clock = SPI1_TX_DMA_CLOCK, \
67 .clock = SPI1_RX_DMA_CLOCK, \
87 .clock = FCG1_PERIPH_SPI2, \
105 .clock = SPI2_TX_DMA_CLOCK, \
125 .clock = SPI2_RX_DMA_CLOCK, \
145 .clock = FCG1_PERIPH_SPI3, \
164 .clock = SPI3_TX_DMA_CLOCK, \
184 .clock = SPI3_RX_DMA_CLOCK, \
204 .clock = FCG1_PERIPH_SPI4, \
[all …]
/bsp/hc32/ev_hc32f4a8_lqfp176/board/config/
A Di2c_config.h27 .clock = FCG1_PERIPH_I2C1, \
40 .clock = I2C1_TX_DMA_CLOCK, \
58 .clock = I2C1_RX_DMA_CLOCK, \
78 .clock = FCG1_PERIPH_I2C2, \
90 .clock = I2C2_TX_DMA_CLOCK, \
108 .clock = I2C2_RX_DMA_CLOCK, \
129 .clock = FCG1_PERIPH_I2C3, \
141 .clock = I2C3_TX_DMA_CLOCK, \
159 .clock = I2C3_RX_DMA_CLOCK, \
180 .clock = FCG1_PERIPH_I2C4, \
[all …]
A Dspi_config.h28 .clock = FCG1_PERIPH_SPI1, \
46 .clock = SPI1_TX_DMA_CLOCK, \
66 .clock = SPI1_RX_DMA_CLOCK, \
86 .clock = FCG1_PERIPH_SPI2, \
104 .clock = SPI2_TX_DMA_CLOCK, \
124 .clock = SPI2_RX_DMA_CLOCK, \
144 .clock = FCG1_PERIPH_SPI3, \
163 .clock = SPI3_TX_DMA_CLOCK, \
183 .clock = SPI3_RX_DMA_CLOCK, \
203 .clock = FCG1_PERIPH_SPI4, \
[all …]
A Duart_config.h28 .clock = FCG3_PERIPH_USART1, \
56 .clock = UART1_RX_DMA_CLOCK, \
74 .clock = FCG2_PERIPH_TMR0_1, \
118 .clock = UART1_TX_DMA_CLOCK, \
139 .clock = FCG3_PERIPH_USART2, \
167 .clock = UART2_RX_DMA_CLOCK, \
185 .clock = FCG2_PERIPH_TMR0_1, \
229 .clock = UART2_TX_DMA_CLOCK, \
250 .clock = FCG3_PERIPH_USART3, \
278 .clock = UART3_RX_DMA_CLOCK, \
[all …]
A Dtimer_config.h26 .clock = FCG2_PERIPH_TMRA_1, \
45 .clock = FCG2_PERIPH_TMRA_2, \
64 .clock = FCG2_PERIPH_TMRA_3, \
83 .clock = FCG2_PERIPH_TMRA_4, \
102 .clock = FCG2_PERIPH_TMRA_5, \
121 .clock = FCG2_PERIPH_TMRA_6, \
140 .clock = FCG2_PERIPH_TMRA_7, \
159 .clock = FCG2_PERIPH_TMRA_8, \
178 .clock = FCG2_PERIPH_TMRA_9, \
197 .clock = FCG2_PERIPH_TMRA_10, \
[all …]
/bsp/hc32/lckfb-hc32f4a0-lqfp100/board/config/
A Di2c_config.h27 .clock = FCG1_PERIPH_I2C1, \
40 .clock = I2C1_TX_DMA_CLOCK, \
58 .clock = I2C1_RX_DMA_CLOCK, \
78 .clock = FCG1_PERIPH_I2C2, \
90 .clock = I2C2_TX_DMA_CLOCK, \
108 .clock = I2C2_RX_DMA_CLOCK, \
129 .clock = FCG1_PERIPH_I2C3, \
141 .clock = I2C3_TX_DMA_CLOCK, \
159 .clock = I2C3_RX_DMA_CLOCK, \
180 .clock = FCG1_PERIPH_I2C4, \
[all …]
A Dspi_config.h28 .clock = FCG1_PERIPH_SPI1, \
46 .clock = SPI1_TX_DMA_CLOCK, \
66 .clock = SPI1_RX_DMA_CLOCK, \
86 .clock = FCG1_PERIPH_SPI2, \
104 .clock = SPI2_TX_DMA_CLOCK, \
124 .clock = SPI2_RX_DMA_CLOCK, \
144 .clock = FCG1_PERIPH_SPI3, \
163 .clock = SPI3_TX_DMA_CLOCK, \
183 .clock = SPI3_RX_DMA_CLOCK, \
203 .clock = FCG1_PERIPH_SPI4, \
[all …]
A Dtimer_config.h26 .clock = FCG2_PERIPH_TMRA_1, \
45 .clock = FCG2_PERIPH_TMRA_2, \
64 .clock = FCG2_PERIPH_TMRA_3, \
83 .clock = FCG2_PERIPH_TMRA_4, \
102 .clock = FCG2_PERIPH_TMRA_5, \
121 .clock = FCG2_PERIPH_TMRA_6, \
140 .clock = FCG2_PERIPH_TMRA_7, \
159 .clock = FCG2_PERIPH_TMRA_8, \
178 .clock = FCG2_PERIPH_TMRA_9, \
197 .clock = FCG2_PERIPH_TMRA_10, \
[all …]
/bsp/hc32/ev_hc32f448_lqfp80/board/config/
A Di2c_config.h28 .clock = FCG1_PERIPH_I2C1, \
41 .clock = I2C1_TX_DMA_CLOCK, \
59 .clock = I2C1_RX_DMA_CLOCK, \
79 .clock = FCG1_PERIPH_I2C2, \
91 .clock = I2C2_TX_DMA_CLOCK, \
109 .clock = I2C2_RX_DMA_CLOCK, \
130 .clock = FCG1_PERIPH_I2C3, \
142 .clock = I2C3_TX_DMA_CLOCK, \
160 .clock = I2C3_RX_DMA_CLOCK, \
181 .clock = FCG1_PERIPH_I2C4, \
[all …]
A Duart_config.h29 .clock = FCG3_PERIPH_USART1, \
43 .clock = UART1_RX_DMA_CLOCK, \
61 .clock = FCG2_PERIPH_TMR0_1, \
99 .clock = UART1_TX_DMA_CLOCK, \
120 .clock = FCG3_PERIPH_USART2, \
134 .clock = UART2_RX_DMA_CLOCK, \
152 .clock = FCG2_PERIPH_TMR0_1, \
190 .clock = UART2_TX_DMA_CLOCK, \
211 .clock = FCG3_PERIPH_USART3, \
240 .clock = FCG3_PERIPH_USART4, \
[all …]
/bsp/hc32/ev_hc32f4a0_lqfp176/board/config/
A Di2c_config.h27 .clock = FCG1_PERIPH_I2C1, \
40 .clock = I2C1_TX_DMA_CLOCK, \
58 .clock = I2C1_RX_DMA_CLOCK, \
78 .clock = FCG1_PERIPH_I2C2, \
90 .clock = I2C2_TX_DMA_CLOCK, \
108 .clock = I2C2_RX_DMA_CLOCK, \
129 .clock = FCG1_PERIPH_I2C3, \
141 .clock = I2C3_TX_DMA_CLOCK, \
159 .clock = I2C3_RX_DMA_CLOCK, \
180 .clock = FCG1_PERIPH_I2C4, \
[all …]
A Dspi_config.h28 .clock = FCG1_PERIPH_SPI1, \
46 .clock = SPI1_TX_DMA_CLOCK, \
66 .clock = SPI1_RX_DMA_CLOCK, \
86 .clock = FCG1_PERIPH_SPI2, \
104 .clock = SPI2_TX_DMA_CLOCK, \
124 .clock = SPI2_RX_DMA_CLOCK, \
144 .clock = FCG1_PERIPH_SPI3, \
163 .clock = SPI3_TX_DMA_CLOCK, \
183 .clock = SPI3_RX_DMA_CLOCK, \
203 .clock = FCG1_PERIPH_SPI4, \
[all …]
A Dtimer_config.h26 .clock = FCG2_PERIPH_TMRA_1, \
45 .clock = FCG2_PERIPH_TMRA_2, \
64 .clock = FCG2_PERIPH_TMRA_3, \
83 .clock = FCG2_PERIPH_TMRA_4, \
102 .clock = FCG2_PERIPH_TMRA_5, \
121 .clock = FCG2_PERIPH_TMRA_6, \
140 .clock = FCG2_PERIPH_TMRA_7, \
159 .clock = FCG2_PERIPH_TMRA_8, \
178 .clock = FCG2_PERIPH_TMRA_9, \
197 .clock = FCG2_PERIPH_TMRA_10, \
[all …]
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl702/std/src/
A Dbl702_clock.c244 uint32_t clock = 0; in Clock_System_Clock_Get() local
260 return clock / (div + 1); in Clock_System_Clock_Get()
266 return clock / (div + 1); in Clock_System_Clock_Get()
646 uint32_t clock = 0; in Clock_Peripheral_Clock_Get() local
658 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
664 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
670 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
676 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
681 return clock; in Clock_Peripheral_Clock_Get()
691 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
[all …]
/bsp/essemi/es32f369x/libraries/ES32F36xx_ALD_StdPeriph_Driver/Source/
A Dald_cmu.c176 __system_clock = clock; in cmu_clock_update()
178 if (clock > 1000000) in cmu_clock_update()
329 assert_param(clock == 24000000 || clock == 2000000); in ald_cmu_clock_config()
339 if (clock == 24000000) in ald_cmu_clock_config()
352 cmu_clock_update(clock); in ald_cmu_clock_config()
417 if (clock == 96000000) { in ald_cmu_clock_config()
424 if (clock == 72000000) { in ald_cmu_clock_config()
427 if ((clock == 48000000) || (clock == 36000000)) { in ald_cmu_clock_config()
431 cmu_clock_update(clock); in ald_cmu_clock_config()
435 assert_param(clock <= 24000000); in ald_cmu_clock_config()
[all …]
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl602/std/src/
A Dbl602_clock.c247 uint32_t clock = 0; in Clock_System_Clock_Get() local
263 return clock / (div + 1); in Clock_System_Clock_Get()
269 return clock / (div + 1); in Clock_System_Clock_Get()
538 uint32_t clock = 0; in Clock_Peripheral_Clock_Get() local
550 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
556 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
562 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
568 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
578 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
588 clock = Clock_IR_Clk_Mux_Output(); in Clock_Peripheral_Clock_Get()
[all …]
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/mcu/all/
A Dbsp_common.h303 __STATIC_INLINE uint32_t R_FSP_SystemClockHzGet (fsp_priv_clock_t clock) in R_FSP_SystemClockHzGet() argument
310 switch (clock) in R_FSP_SystemClockHzGet()
334 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_S->SCKCR2_b.DIVSELSUB]; in R_FSP_SystemClockHzGet()
340 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI0ASYNCSEL]; in R_FSP_SystemClockHzGet()
346 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI1ASYNCSEL]; in R_FSP_SystemClockHzGet()
352 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI2ASYNCSEL]; in R_FSP_SystemClockHzGet()
358 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_S->SCKCR2_b.SPI3ASYNCSEL]; in R_FSP_SystemClockHzGet()
364 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI0ASYNCSEL]; in R_FSP_SystemClockHzGet()
370 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI1ASYNCSEL]; in R_FSP_SystemClockHzGet()
376 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI2ASYNCSEL]; in R_FSP_SystemClockHzGet()
[all …]
/bsp/hc32/ev_hc32f334_lqfp64/board/config/
A Duart_config.h28 .clock = FCG3_PERIPH_USART1, \
42 .clock = UART1_RX_DMA_CLOCK, \
60 .clock = FCG2_PERIPH_TMR0_1, \
98 .clock = UART1_TX_DMA_CLOCK, \
119 .clock = FCG3_PERIPH_USART2, \
133 .clock = UART2_RX_DMA_CLOCK, \
151 .clock = FCG2_PERIPH_TMR0_1, \
189 .clock = UART2_TX_DMA_CLOCK, \
210 .clock = FCG3_PERIPH_USART3, \
224 .clock = UART3_RX_DMA_CLOCK, \
[all …]
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/mcu/all/
A Dbsp_common.h302 __STATIC_INLINE uint32_t R_FSP_SystemClockHzGet (fsp_priv_clock_t clock) in R_FSP_SystemClockHzGet() argument
307 switch (clock) in R_FSP_SystemClockHzGet()
323 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_S->SCKCR2_b.DIVSELSUB]; in R_FSP_SystemClockHzGet()
329 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI0ASYNCSEL]; in R_FSP_SystemClockHzGet()
335 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI1ASYNCSEL]; in R_FSP_SystemClockHzGet()
341 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI2ASYNCSEL]; in R_FSP_SystemClockHzGet()
347 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_S->SCKCR2_b.SPI3ASYNCSEL]; in R_FSP_SystemClockHzGet()
353 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI0ASYNCSEL]; in R_FSP_SystemClockHzGet()
359 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI1ASYNCSEL]; in R_FSP_SystemClockHzGet()
365 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI2ASYNCSEL]; in R_FSP_SystemClockHzGet()
[all …]
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/mcu/all/
A Dbsp_common.h302 __STATIC_INLINE uint32_t R_FSP_SystemClockHzGet (fsp_priv_clock_t clock) in R_FSP_SystemClockHzGet() argument
307 switch (clock) in R_FSP_SystemClockHzGet()
323 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_S->SCKCR2_b.DIVSELSUB]; in R_FSP_SystemClockHzGet()
329 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI0ASYNCSEL]; in R_FSP_SystemClockHzGet()
335 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI1ASYNCSEL]; in R_FSP_SystemClockHzGet()
341 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SPI2ASYNCSEL]; in R_FSP_SystemClockHzGet()
347 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_S->SCKCR2_b.SPI3ASYNCSEL]; in R_FSP_SystemClockHzGet()
353 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI0ASYNCSEL]; in R_FSP_SystemClockHzGet()
359 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI1ASYNCSEL]; in R_FSP_SystemClockHzGet()
365 clock_hz = g_bsp_system_clock_select[clock][R_SYSC_NS->SCKCR_b.SCI2ASYNCSEL]; in R_FSP_SystemClockHzGet()
[all …]
/bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/
A Dspi_config.h28 .clock = FCG1_PERIPH_SPI1, \
46 .clock = SPI1_TX_DMA_CLOCK, \
66 .clock = SPI1_RX_DMA_CLOCK, \
86 .clock = FCG1_PERIPH_SPI2, \
104 .clock = SPI2_TX_DMA_CLOCK, \
124 .clock = SPI2_RX_DMA_CLOCK, \
144 .clock = FCG1_PERIPH_SPI3, \
163 .clock = SPI3_TX_DMA_CLOCK, \
183 .clock = SPI3_RX_DMA_CLOCK, \
203 .clock = FCG1_PERIPH_SPI4, \
[all …]
A Di2c_config.h27 .clock = FCG1_PERIPH_I2C1, \
40 .clock = I2C1_TX_DMA_CLOCK, \
58 .clock = I2C1_RX_DMA_CLOCK, \
78 .clock = FCG1_PERIPH_I2C2, \
90 .clock = I2C2_TX_DMA_CLOCK, \
108 .clock = I2C2_RX_DMA_CLOCK, \
129 .clock = FCG1_PERIPH_I2C3, \
141 .clock = I2C3_TX_DMA_CLOCK, \
159 .clock = I2C3_RX_DMA_CLOCK, \

Completed in 34 milliseconds

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