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Searched refs:cpha (Results 1 – 23 of 23) sorted by relevance

/bsp/loongson/ls2kdev/drivers/
A Ddrv_spi.c29 static void spi_init(uint8_t spre_spr, uint8_t copl, uint8_t cpha) in spi_init() argument
35 SET_SPI(SPCR, 0x50 | copl << 3 | cpha << 2 | (spre_spr & 0b00000011)); in spi_init()
82 uint8_t spre_spr, cpol, cpha; in cmd_spi_init() local
92 cpha = strtoul(argv[3], NULL, 0); in cmd_spi_init()
146 unsigned char cpha = 0; in configure() local
162 cpha = 1; in configure()
166 cpha = 0; in configure()
177 spi_init(SPI_DIV_TABLE[ctr], cpol, cpha); in configure()
/bsp/loongson/ls1cdev/drivers/
A Ddrv_spi.c48 unsigned char cpha = 0; in configure() local
92 cpha = SPI_CPHA_1; in configure()
96 cpha = SPI_CPHA_0; in configure()
98 ls1c_spi_set_mode(spi_base, cpol, cpha); in configure()
/bsp/raspberry-pico/Drivers/
A Ddrv_spi.c67 spi_cpha_t cpha; in pico_spi_init() local
81 cpha = SPI_CPHA_1; in pico_spi_init()
85 cpha = SPI_CPHA_0; in pico_spi_init()
100 spi_set_format(spi_handle, cfg->data_width, cpol, cpha, SPI_MSB_FIRST); in pico_spi_init()
/bsp/loongson/ls1cdev/libraries/
A Dls1c_spi.c167 void ls1c_spi_set_mode(void *spi_base, unsigned char cpol, unsigned char cpha) in ls1c_spi_set_mode() argument
179 val |= (cpha << LS1C_SPI_SPCR_CPHA_BIT); // 写入新的cpha in ls1c_spi_set_mode()
A Dls1c_spi.h98 void ls1c_spi_set_mode(void *spi_base, unsigned char cpol, unsigned char cpha);
/bsp/allwinner/libraries/drivers/
A Ddrv_spi.c89 hal_cfg.cpha = HAL_SPI_MASTER_CLOCK_PHASE1; in hw_spi_configure()
93 hal_cfg.cpha = HAL_SPI_MASTER_CLOCK_PHASE0; in hw_spi_configure()
217 .cpha = HAL_SPI_MASTER_CLOCK_PHASE0,
/bsp/allwinner/libraries/sunxi-hal/hal/test/spi/
A Dtest_spi.c81 cfg.cpha = HAL_SPI_MASTER_CLOCK_PHASE0; in cmd_test_spi()
/bsp/phytium/libraries/drivers/
A Ddrv_spi.c112 set_input_cfg->cpha = FSPIM_CPHA_2_EDGE; in spim_configure()
116 set_input_cfg->cpha = FSPIM_CPHA_1_EDGE; in spim_configure()
/bsp/core-v-mcu/Libraries/core_v_hal_libraries/core_v_hal/include/
A Dhal_spi_periph.h263 #define SPI_CMD_CFG(clockDiv, cpol, cpha) \ argument
266 ((cpha) << SPI_CMD_CFG_CPHA_OFFSET) | \
/bsp/allwinner/libraries/sunxi-hal/include/hal/
A Dsunxi_hal_spi.h206 cpha; /**< SPI master clock phase setting. 0: Phase 0(Leading edge member
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_spi_drv.c283 config->common_config.cpha = spi_sclk_sampling_even_clk_edges; in spi_master_get_default_format_config()
294 config->common_config.cpha = spi_sclk_sampling_even_clk_edges; in spi_slave_get_default_format_config()
363 SPI_TRANSFMT_CPHA_SET(config->common_config.cpha); in spi_format_init()
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_lpspi.h257 lpspi_clock_phase_t cpha; /*!< Clock phase. */ member
283 lpspi_clock_phase_t cpha; /*!< Clock phase. */ member
A Dfsl_lpspi.c206 base->TCR = LPSPI_TCR_CPOL(masterConfig->cpol) | LPSPI_TCR_CPHA(masterConfig->cpha) | in LPSPI_MasterInit()
226 masterConfig->cpha = kLPSPI_ClockPhaseFirstEdge; in LPSPI_MasterGetDefaultConfig()
268 base->TCR = LPSPI_TCR_CPOL(slaveConfig->cpol) | LPSPI_TCR_CPHA(slaveConfig->cpha) | in LPSPI_SlaveInit()
283 slaveConfig->cpha = kLPSPI_ClockPhaseFirstEdge; /*!< Clock phase. */ in LPSPI_SlaveGetDefaultConfig()
/bsp/nxp/imx/imxrt/libraries/drivers/
A Ddrv_spi.c307 masterConfig.cpha = kLPSPI_ClockPhaseSecondEdge; in spi_configure()
311 masterConfig.cpha = kLPSPI_ClockPhaseFirstEdge; in spi_configure()
/bsp/frdm-k64f/device/MK64F12/
A Dfsl_dspi.h257 dspi_clock_phase_t cpha; /*!< Clock phase. */ member
295 dspi_clock_phase_t cpha; /*!< Clock phase. */ member
A Dfsl_dspi.c196 … SPI_CTAR_CPHA(masterConfig->ctarConfig.cpha) | SPI_CTAR_LSBFE(masterConfig->ctarConfig.direction); in DSPI_MasterInit()
216 masterConfig->ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge; in DSPI_MasterGetDefaultConfig()
263 SPI_CTAR_SLAVE_CPHA(slaveConfig->ctarConfig.cpha); in DSPI_SlaveInit()
275 slaveConfig->ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge; in DSPI_SlaveGetDefaultConfig()
/bsp/thead-smart/drivers/
A Ddrv_usart.h416 int32_t csi_usart_config_clock(usart_handle_t handle, usart_cpol_e cpol, usart_cpha_e cpha);
A Dck_usart.c1136 int32_t csi_usart_config_clock(usart_handle_t handle, usart_cpol_e cpol, usart_cpha_e cpha) in csi_usart_config_clock() argument
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_spi_drv.h186 uint8_t cpha; member
/bsp/hpmicro/libraries/hpm_sdk/components/serial_nor/interface/spi/
A Dhpm_serial_nor_host_spi.c171 format_config.common_config.cpha = spi_sclk_sampling_odd_clk_edges; in init()
/bsp/hpmicro/libraries/drivers/
A Ddrv_spi.c295 format_config.common_config.cpha = cfg->mode & RT_SPI_CPHA ? 1 : 0; in hpm_spi_configure()
/bsp/allwinner/libraries/sunxi-hal/hal/source/spinor/
A Dcore.c342 spim->cfg.cpha = HAL_SPI_MASTER_CLOCK_PHASE0; in nor_spi_master_init()
/bsp/allwinner/libraries/sunxi-hal/hal/source/spi/
A Dhal_spi.c1783 config |= (spi_config->cpol) | (spi_config->cpha); in hal_spi_hw_config()

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