Searched refs:cpu_cfg (Results 1 – 6 of 6) sorted by relevance
| /bsp/bouffalo_lab/bl808/m0/board/ |
| A D | fw_header.c | 166 .cpu_cfg[0].rsvd = 0x0,
168 .cpu_cfg[0].cache_range_h = 0x00000000,
169 .cpu_cfg[0].cache_range_l = 0x00000000,
171 .cpu_cfg[0].image_address_offset = 0x0,
172 .cpu_cfg[0].rsvd0 = 0x58000000, /* rsvd0 */
173 .cpu_cfg[0].msp_val = 0x00000000, /* msp value */
183 .cpu_cfg[1].rsvd = 0x0,
185 .cpu_cfg[1].cache_range_h = 0x00000000,
186 .cpu_cfg[1].cache_range_l = 0x00000000,
188 .cpu_cfg[1].image_address_offset = 0x0,
[all …]
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| A D | fw_header.h | 194 struct boot_cpu_cfg_t cpu_cfg[3]; /*24*3 */ member
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| /bsp/bouffalo_lab/bl808/lp/board/ |
| A D | fw_header.c | 166 .cpu_cfg[0].rsvd = 0x0,
168 .cpu_cfg[0].cache_range_h = 0x00000000,
169 .cpu_cfg[0].cache_range_l = 0x00000000,
171 .cpu_cfg[0].image_address_offset = 0x0,
172 .cpu_cfg[0].rsvd0 = 0x58000000, /* rsvd0 */
173 .cpu_cfg[0].msp_val = 0x00000000, /* msp value */
183 .cpu_cfg[1].rsvd = 0x0,
185 .cpu_cfg[1].cache_range_h = 0x00000000,
186 .cpu_cfg[1].cache_range_l = 0x00000000,
188 .cpu_cfg[1].image_address_offset = 0x0,
[all …]
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| A D | fw_header.h | 194 struct boot_cpu_cfg_t cpu_cfg[3]; /*24*3 */ member
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| /bsp/bouffalo_lab/bl61x/board/ |
| A D | fw_header.c | 144 .cpu_cfg.config_enable = 0x01, /* coinfig this cpu */
145 .cpu_cfg.halt_cpu = 0x0, /* halt this cpu */
146 .cpu_cfg.cache_enable = 0x0, /* cache setting :only for BL Cache */
147 .cpu_cfg.cache_wa = 0x0, /* cache setting :only for BL Cache*/
148 .cpu_cfg.cache_wb = 0x0, /* cache setting :only for BL Cache*/
149 .cpu_cfg.cache_wt = 0x0, /* cache setting :only for BL Cache*/
150 .cpu_cfg.cache_way_dis = 0x0, /* cache setting :only for BL Cache*/
151 .cpu_cfg.rsvd = 0x0,
154 .cpu_cfg.image_address_offset = 0x0,
155 .cpu_cfg.rsvd1 = 0xA0000000, /* rsvd */
[all …]
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| A D | fw_header.h | 181 struct boot_cpu_cfg_t cpu_cfg; /* 16 */ member
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