1 /*
2  * Allwinner SoCs display driver.
3  *
4  * Copyright (C) 2016 Allwinner.
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10 
11 /**
12  *  All Winner Tech, All Right Reserved. 2014-2015 Copyright (c)
13  *
14  *  File name   :       de_wb_type.h
15  *
16  *  Description :       display engine 2.0 wbc struct declaration
17  *
18  *  History     :       2014/03/03   wangxuan   initial version
19  *
20  */
21 #ifndef __DE_WB_TYPE_H__
22 #define __DE_WB_TPYE_H__
23 
24 #define ____SEPARATOR_DEFEINE____
25 #define WB_END_IE   0x1
26 #define WB_FINISH_IE    (0x1<<4)
27 #define WB_FIFO_OVERFLOW_ERROR_IE   (0x1<<5)
28 #define WB_TIMEOUT_ERROR_IE (0x1<<6)
29 
30 #define MININWIDTH 8
31 #define MININHEIGHT 4
32 /* support 8192,limit by LCD */
33 #define MAXINWIDTH 4096
34 /* support 8192,limit by LCD */
35 #define MAXINHEIGHT 4096
36 #define LINE_BUF_LEN 2048
37 #define LOCFRACBIT 18
38 #define SCALERPHASE 16
39 
40 #define ____SEPARATOR_REGISTERS____
41 union __wb_gctrl_reg_t {
42     unsigned int dwval;
43     struct {
44         unsigned int wb_start:1;
45         unsigned int r0:3;
46         unsigned int soft_reset:1;
47         unsigned int self_timing:1; /* bit5 */
48         unsigned int r1:10;
49         unsigned int in_port_sel:2;
50         unsigned int r2:10;
51         unsigned int auto_gate_en:1;
52         unsigned int clk_gate:1;
53         unsigned int r3:1;
54         unsigned int bist_en:1;
55     } bits;
56 };
57 
58 union __wb_size_reg_t {
59     unsigned int dwval;
60     struct {
61         unsigned int width:13;
62         unsigned int r0:3;
63         unsigned int height:13;
64         unsigned int r1:3;
65     } bits;
66 };
67 
68 union __wb_crop_coord_reg_t {
69     unsigned int dwval;
70     struct {
71         unsigned int crop_left:13;
72         unsigned int r0:3;
73         unsigned int crop_top:13;
74         unsigned int r1:3;
75     } bits;
76 };
77 
78 union __wb_crop_size_reg_t {
79     unsigned int dwval;
80     struct {
81         unsigned int crop_width:13;
82         unsigned int r0:3;
83         unsigned int crop_height:13;
84         unsigned int r1:3;
85     } bits;
86 };
87 
88 union __wb_addr_reg_t {
89     unsigned int dwval;
90     struct {
91         unsigned int addr:32;
92     } bits;
93 };
94 
95 union __wb_high_addr_reg_t {
96     unsigned int dwval;
97     struct {
98         unsigned int ch0_h_addr:8;
99         unsigned int ch1_h_addr:8;
100         unsigned int ch2_h_addr:8;
101         unsigned int r0:8;
102     } bits;
103 };
104 
105 union __wb_pitch_reg_t {
106     unsigned int dwval;
107     struct {
108         unsigned int pitch:32;
109     } bits;
110 };
111 
112 union __wb_addr_switch_reg_t {
113     unsigned int dwval;
114     struct {
115         unsigned int cur_group:1;
116         unsigned int r0:15;
117         unsigned int auto_switch:1;
118         unsigned int r1:3;
119         unsigned int manual_group:1;
120         unsigned int r2:11;
121     } bits;
122 };
123 
124 union __wb_format_reg_t {
125     unsigned int dwval;
126     struct {
127         unsigned int format:4;
128         unsigned int r0:28;
129     } bits;
130 };
131 
132 union __wb_int_reg_t {
133     unsigned int dwval;
134     struct {
135         unsigned int int_en:1;
136         unsigned int r0:31;
137     } bits;
138 };
139 
140 union __wb_status_reg_t {
141     unsigned int dwval;
142     struct {
143         unsigned int irq:1;
144         unsigned int r0:3;
145         unsigned int finish:1;
146         unsigned int overflow:1;
147         unsigned int timeout:1;
148         unsigned int r1:1;
149         unsigned int busy:1;
150         unsigned int r2:23;
151     } bits;
152 };
153 
154 union __wb_bypass_reg_t {
155     unsigned int dwval;
156     struct {
157         unsigned int csc_en:1;
158         unsigned int cs_en:1;
159         unsigned int fs_en:1;
160         unsigned int r0:29;
161     } bits;
162 };
163 
164 union __wb_cs_reg_t {
165     unsigned int dwval;
166     struct {
167         unsigned int m:13;
168         unsigned int r1:3;
169         unsigned int n:13;
170         unsigned int r0:3;
171     } bits;
172 };
173 
174 union __wb_fs_size_reg_t {
175     unsigned int dwval;
176     struct {
177         unsigned int width:13;
178         unsigned int r1:3;
179         unsigned int height:13;
180         unsigned int r0:3;
181     } bits;
182 };
183 
184 union __wb_fs_step_reg_t {
185     unsigned int dwval;
186     struct {
187         unsigned int r1:2;
188         unsigned int frac:18;
189         unsigned int intg:2;
190         unsigned int r0:10;
191     } bits;
192 };
193 
194 union __wb_coeff_reg_t {
195     unsigned int dwval;
196     struct {
197         unsigned int coef0:8;
198         unsigned int coef1:8;
199         unsigned int coef2:8;
200         unsigned int coef3:8;
201     } bits;
202 };
203 union __wb_csc_coeff_reg_t {
204     unsigned int dwval;
205     struct {
206         unsigned int coff       :13;/* Default: 0x0; */
207         unsigned int res0       :19;/* Default: ; */
208     } bits;
209 };
210 
211 union __wb_csc_const_reg_t {
212     unsigned int dwval;
213     struct {
214         unsigned int cont           :20;/* Default: 0x0; */
215         unsigned int res0           :12;/* Default: ; */
216     } bits;
217 };
218 
219 union __wb_sftm_reg_t {
220     unsigned int dwval;
221     struct {
222         unsigned int sf_vs      :  10;     /* Default: 0x0; */
223         unsigned int res0       :  22;     /* Default: ; */
224     } bits;
225 };
226 
227 struct __wb_reg_t {
228     union __wb_gctrl_reg_t gctrl;           /* 0x0000 */
229     union __wb_size_reg_t size;         /* 0x0004 */
230     union __wb_crop_coord_reg_t crop_coord;     /* 0x0008 */
231     union __wb_crop_size_reg_t crop_size;       /* 0x000c */
232     union __wb_addr_reg_t wb_addr_a0;       /* 0x0010 */
233     union __wb_addr_reg_t wb_addr_a1;       /* 0x0014 */
234     union __wb_addr_reg_t wb_addr_a2;       /* 0x0018 */
235     union __wb_high_addr_reg_t wb_addr_ah;      /* 0x001c */
236     union __wb_addr_reg_t wb_addr_b0;       /* 0x0020 */
237     union __wb_addr_reg_t wb_addr_b1;       /* 0x0024 */
238     union __wb_addr_reg_t wb_addr_b2;       /* 0x0028 */
239     union __wb_high_addr_reg_t wb_addr_bh;      /* 0x002c */
240     union __wb_pitch_reg_t wb_pitch0;       /* 0x0030 */
241     union __wb_pitch_reg_t wb_pitch1;       /* 0x0034 */
242     unsigned int res0[2];               /* 0x0038-0x003c */
243     union __wb_addr_switch_reg_t addr_switch;   /* 0x0040 */
244     union __wb_format_reg_t fmt;            /* 0x0044 */
245     union __wb_int_reg_t intr;          /* 0x0048 */
246     union __wb_status_reg_t status;         /* 0x004c */
247     unsigned int res1;              /* 0x0050 */
248     union __wb_bypass_reg_t bypass;         /* 0x0054 */
249     unsigned int res2[6];               /* 0x0058-0x006c */
250     union __wb_cs_reg_t cs_horz;            /* 0x0070 */
251     union __wb_cs_reg_t cs_vert;            /* 0x0074 */
252     unsigned int res3[2];               /* 0x0078-0x007c */
253     union __wb_fs_size_reg_t fs_insize;     /* 0x0080 */
254     union __wb_fs_size_reg_t fs_outsize;        /* 0x0084 */
255     union __wb_fs_step_reg_t fs_hstep;      /* 0x0088 */
256     union __wb_fs_step_reg_t fs_vstep;      /* 0x008c */
257     unsigned int res4[28];              /* 0x0090-0x00fc */
258     union __wb_csc_coeff_reg_t  c00;/* 0x0100 */
259     union __wb_csc_coeff_reg_t  c01;/* 0x0104 */
260     union __wb_csc_coeff_reg_t  c02;/* 0x0108 */
261     union __wb_csc_const_reg_t  c03;/* 0x010C */
262     union __wb_csc_coeff_reg_t  c10;/* 0x0110 */
263     union __wb_csc_coeff_reg_t  c11;/* 0x0114 */
264     union __wb_csc_coeff_reg_t  c12;/* 0x0118 */
265     union __wb_csc_const_reg_t  c13;/* 0x011C */
266     union __wb_csc_coeff_reg_t  c20;/* 0x0120 */
267     union __wb_csc_coeff_reg_t  c21;/* 0x0124 */
268     union __wb_csc_coeff_reg_t  c22;/* 0x0128 */
269     union __wb_csc_const_reg_t  c23;/* 0x012C */
270     unsigned int res41[52];         /* 0x0130-0x01fc */
271     union __wb_coeff_reg_t yhcoeff[16]; /* 0X0200-0x23c */
272     unsigned int res5[16];          /* 0X0240-0x27c */
273     union __wb_coeff_reg_t chcoeff[16]; /* 0X0280-0x2bc */
274     unsigned int res6[16];          /* 0x02c0-0x02fc */
275 };
276 
277 enum wb_output_fmt {
278     WB_FORMAT_RGB_888    = 0x0,
279     WB_FORMAT_BGR_888    = 0x1,
280     WB_FORMAT_ARGB_8888  = 0x4,
281     WB_FORMAT_ABGR_8888  = 0x5,
282     WB_FORMAT_BGRA_8888  = 0x6,
283     WB_FORMAT_RGBA_8888  = 0x7,
284     WB_FORMAT_YUV420_P   = 0x8,
285     WB_FORMAT_Y      = 0x9,
286     WB_FORMAT_YUV420_SP_VUVU = 0xc,
287     WB_FORMAT_YUV420_SP_UVUV = 0xd,
288 };
289 
290 #if defined(CONFIG_EINK_PANEL_USED)
291 typedef struct {
292     int width;
293     int height;
294     int addr[3];
295     int csc_std;
296 } __einkwb_config_t;
297 
298 #define EWB_OK 0
299 #define EWB_OVFL 1
300 #define EWB_TIMEOUT 2
301 #define EWB_BUSY 3
302 #define EWB_ERR 4
303 extern unsigned int wb_lan2coefftab16[16];
304 extern unsigned int wb_lan2coefftab16_down[16];
305 
306 extern int wb_eink_set_reg_base(unsigned int sel, unsigned int base);
307 extern int wb_eink_init(unsigned int sel, unsigned int base_addr);
308 extern int wb_eink_close(unsigned int sel);
309 extern int wb_eink_reset(unsigned int sel);
310 extern int wb_eink_dereset(unsigned int sel);
311 extern int wb_eink_set_para(unsigned int sel, __einkwb_config_t *cfg);
312 extern int wb_eink_writeback_enable(unsigned int sel);
313 extern int wb_eink_get_status(unsigned int sel);
314 extern int wb_eink_enableint(unsigned int sel);
315 extern int wb_eink_disableint(unsigned int sel);
316 extern int wb_eink_clearint(unsigned int sel);
317 #endif
318 #endif
319