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/bsp/bouffalo_lab/bl808/
A DREADME.md11 多媒体子系统包含一颗 RISC-V 64-bit 超高性能 CPU（d0），集成 DVP/CSI/ H264/NPU 等视频处理模块，可以广泛应用于视频监控/智能音箱等多种 AI 领域
46 BL808是三核异构架构，分别为m0、lp、d0，当前bsp已实现三核同时启动，三核分别采用了不同的RT-Thread版本
59 BL808是三核异构架构，分别为m0、lp、d0，三核需要单独编译，并烧录到对应的位置。
67 | D0 | C906 | 0x100000 | 在spl文件中设定，调整d0烧录地址需重新编译spl文件及打包文件`bsp/bouffalo_lab/bl808/d0/merge_rtsma…
119 由于BL808为三核异构，lp核、d0核都是通过m0核启动的，必须正确烧录m0核才可以实现三核正常运行
125 ### 3.2. d0
135 预编译bin文件位于`bsp/bouffalo_lab/bl808/d0/pre_build_bin`文件夹下，如有修改需求可下载[Low-Starup-BL808](https://github.…
137 d0单独烧录文件为`bsp/bouffalo_lab/bl808/d0/flash_prog_cfg.ini`
139 ![d0](figures/d0.png)
145 - 可运行`bsp/bouffalo_lab/bl808/build_bl808_all.sh`依次编译m0、lp、d0核
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A DREADME_en.md11 The multimedia subsystem includes a RISC-V 64-bit ultra-high-performance CPU (d0) and integrated DV…
45 BL808 is a three-core heterogeneous architecture, including m0, lp, and d0 cores. The current BSP s…
58 BL808 is a three-core heterogeneous architecture, including m0, lp, and d0 cores. Each core needs t…
66 …| Set in the SPL file. To adjust the d0 flash address, the SPL file and the packaged file `bsp/bou…
117 …Since BL808 is a three-core heterogeneous architecture, the lp and d0 cores are started through th…
123 ### 3.2. d0
133 The pre-compiled bin files are located in the `bsp/bouffalo_lab/bl808/d0/pre_build_bin` folder. If …
135 The separate flashing file for d0 is `bsp/bouffalo_lab/bl808/d0/flash_prog_cfg.ini`.
137 ![d0](figures/d0.png)
143 - You can run `bsp/bouffalo_lab/bl808/build_bl808_all.sh` to compile m0, lp, d0 cores one by one.
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A Dbuild_bl808_all.sh5 scons -C d0
A Dflash_prog_cfg.ini18 filedir = ./d0/whole_img_d0.bin
/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/de/lowlevel_v2x/
A Ddisp_eink_data.h77 __u32 d0 : 1; /* D3 */ member
129 __u16 d0 : 1; /* D8 */ member
179 __u32 d0 : 1; /* D8 */ member
A Dde_dsi.c1163 dsi_dev[sel]->dsi_sync_hss.bits.d0 = 0; in dsi_packet_cfg()
1169 dsi_dev[sel]->dsi_sync_hse.bits.d0 = 0; in dsi_packet_cfg()
1175 dsi_dev[sel]->dsi_sync_vss.bits.d0 = 0; in dsi_packet_cfg()
1181 dsi_dev[sel]->dsi_sync_vse.bits.d0 = 0; in dsi_packet_cfg()
A Dde_dsi_type.h282 u32 d0:8; member
/bsp/rockchip/rk3500/driver/clk/
A Dclk-pll-rk3568.c71 rt_ubase_t n, d, n0, d0, n1, d1; in rational_best_approximation() local
78 d0 = 1; in rational_best_approximation()
87 d1 = d0; in rational_best_approximation()
101 t = d0 + a * d1; in rational_best_approximation()
102 d0 = d1; in rational_best_approximation()
A Dclk-pll-rk3588.c103 rt_ubase_t n, d, n0, d0, n1, d1; in rational_best_approximation() local
110 d0 = 1; in rational_best_approximation()
119 d1 = d0; in rational_best_approximation()
133 t = d0 + a * d1; in rational_best_approximation()
134 d0 = d1; in rational_best_approximation()
/bsp/bouffalo_lab/
A Dbouffalo_flash_cube.sh42 CONFIG_DIR=./bl808/d0
A DREADME.md15 | 4 | bl808 | RISC-V T-Head E902(lp)+E907(m0)+C906(d0) |
54 bl60x/bl70x/bl61x可在对应芯片直接编译；bl808是多核异构架构，分为m0、lp、d0，每个核需要单独编译并烧录到对应的位置，bl808三核使用详细参考[bl808三核使用指南](.…
165 - bl616：芯片名称(bl808：三核同时下载；或者输入:bl808-m0/bl808-lp/bl808-d0分别烧录对应的核，但是m0必须要烧录才能运行)
A DREADME_en.md15 | 4 | bl808 | RISC-V T-Head E902(lp)+E907(m0)+C906(d0) |
54 …bl808 is a multi-core heterogeneous architecture, divided into m0, lp, and d0. Each core needs to …
147 …8: simultaneous flashing of three cores; or enter: bl808-m0/bl808-lp/bl808-d0 to flash the corresp…
/bsp/raspberry-pi/raspi3-32/cpu/
A Dcontext_gcc.S172 vldmia sp!, {d0-d15}
A Dstart_gcc.S243 vstmdb r0!, {d0-d15}
/bsp/k210/drivers/
A DKconfig77 int "spi1 d0 pin number"

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