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/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi-ng/
A Dclk-divider.c117 if (clkt->div == div) in _get_table_val()
195 if (clkt->div == div) in _is_valid_table_div()
228 if (clkt->div == div) in _round_up_table()
232 else if (clkt->div < div) in _round_up_table()
237 if ((clkt->div - div) < (up - div)) in _round_up_table()
253 if (clkt->div == div) in _round_down_table()
257 else if (clkt->div > div) in _round_down_table()
262 if ((div - clkt->div) < (div - down)) in _round_down_table()
323 div = __roundup_pow_of_two(div); in _div_round_up()
327 div = _round_up_table(table, div); in _div_round_up()
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A Dccu_div.c25 cd->div.table, cd->div.width, in ccu_div_round_rate()
26 cd->div.flags); in ccu_div_round_rate()
65 val = reg >> cd->div.shift; in ccu_div_recalc_rate()
66 val &= (1 << cd->div.width) - 1; in ccu_div_recalc_rate()
71 val = divider_recalc_rate(hw, parent_rate, val, cd->div.table, in ccu_div_recalc_rate()
72 cd->div.flags, cd->div.width); in ccu_div_recalc_rate()
107 val = divider_get_val(rate, parent_rate, cd->div.table, cd->div.width, in ccu_div_set_rate()
108 cd->div.flags); in ccu_div_set_rate()
113 reg &= ~GENMASK(cd->div.width + cd->div.shift - 1, cd->div.shift); in ccu_div_set_rate()
115 writel(reg | (val << cd->div.shift), in ccu_div_set_rate()
/bsp/nxp/imx/imxrt/imxrt1170-nxp-evk/board/MCUX_Config/
A Dclock_config.c360 rootCfg.div = 1; in BOARD_BootClockRUN()
364 rootCfg.div = 1; in BOARD_BootClockRUN()
370 rootCfg.div = 1; in BOARD_BootClockRUN()
374 rootCfg.div = 1; in BOARD_BootClockRUN()
433 rootCfg.div = 1; in BOARD_BootClockRUN()
440 rootCfg.div = 2; in BOARD_BootClockRUN()
446 rootCfg.div = 2; in BOARD_BootClockRUN()
451 rootCfg.div = 3; in BOARD_BootClockRUN()
457 rootCfg.div = 3; in BOARD_BootClockRUN()
469 rootCfg.div = 1; in BOARD_BootClockRUN()
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/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl702/std/src/
A Dbl702_clock.c181 uint32_t div = 0; in Clock_F32k_Mux_Output() local
245 uint32_t div = 0; in Clock_System_Clock_Get() local
260 return clock / (div + 1); in Clock_System_Clock_Get()
266 return clock / (div + 1); in Clock_System_Clock_Get()
377 uint32_t div = 0; in Clock_GPADC_Clk_Mux_Output() local
647 uint32_t div = 0; in Clock_Peripheral_Clock_Get() local
658 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
664 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
670 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
676 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
[all …]
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl602/std/src/
A Dbl602_clock.c212 uint32_t div = 0; in Clock_F32k_Mux_Output() local
248 uint32_t div = 0; in Clock_System_Clock_Get() local
263 return clock / (div + 1); in Clock_System_Clock_Get()
269 return clock / (div + 1); in Clock_System_Clock_Get()
374 uint32_t div = 0; in Clock_GPADC_Clk_Mux_Output() local
539 uint32_t div = 0; in Clock_Peripheral_Clock_Get() local
550 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
556 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
562 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
568 return clock / (div + 1); in Clock_Peripheral_Clock_Get()
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/bsp/loongson/ls1cdev/libraries/
A Dls1c_spi.c76 unsigned int div = 0; in ls1c_spi_get_div() local
83 if (div < 2) in ls1c_spi_get_div()
84 div = 2; in ls1c_spi_get_div()
86 if (div > 4096) in ls1c_spi_get_div()
87 div = 4096; in ls1c_spi_get_div()
89 bit = ls1c_fls(div) - 1; in ls1c_spi_get_div()
94 if (div > (1 << bit)) in ls1c_spi_get_div()
102 if (div > (1 << bit)) in ls1c_spi_get_div()
110 if (div > (1 << bit)) in ls1c_spi_get_div()
118 if (div > (1 << bit)) in ls1c_spi_get_div()
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/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/src/
A Dbl808_clock.c482 uint32_t div = 0; in Clock_F32k_Mux_Output() local
839 uint32_t div = 0; in Clock_System_Clock_Get() local
951 uint32_t div = 0; in Clock_Get_EMI_Clk() local
994 uint32_t div = 0; in Clock_Get_PSRAMB_Clk() local
1041 uint32_t div = 0; in Clock_Get_Clk() local
1084 uint32_t div = 0; in Clock_Get_H264_Clk() local
1127 uint32_t div = 0; in Clock_Get_BLAI_Clk() local
1150 uint32_t div = 0; in Clock_Display_Clk_Mux_Output() local
1184 uint32_t div = 0; in Clock_Get_Display_Clk() local
1524 uint32_t div = 0; in Clock_GPADC_Clk_Mux_Output() local
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/bsp/avr32/software_framework/drivers/pm/
A Dpower_clocks_lib.c343 for (div = 1; div < 32; div++) in pcl_configure_clocks_uc3c()
348 if (div == 32) in pcl_configure_clocks_uc3c()
351 mul = (in_cpu_f * div) / in_osc0_f; in pcl_configure_clocks_uc3c()
357 while (!(div % 2)) in pcl_configure_clocks_uc3c()
359 div /= 2; in pcl_configure_clocks_uc3c()
391 opt.div = div, // DIV=1 in the formula in pcl_configure_clocks_uc3c()
507 for (div = 1; div < 32; div++) in pcl_configure_clocks_uc3d()
512 if (div == 32) in pcl_configure_clocks_uc3d()
521 while (!(div % 2)) in pcl_configure_clocks_uc3d()
523 div /= 2; in pcl_configure_clocks_uc3d()
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A Dpm_conf_clocks.c70 unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0; in pm_configure_clocks() local
91 for (div = 1; div < 32; div++) in pm_configure_clocks()
93 if ((div * rest) % in_osc0_f == 0) in pm_configure_clocks()
96 if (div == 32) in pm_configure_clocks()
99 mul = (in_cpu_f * div) / in_osc0_f; in pm_configure_clocks()
105 while (!(div % 2)) in pm_configure_clocks()
107 div /= 2; in pm_configure_clocks()
115 while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ) in pm_configure_clocks()
129 pll_freq = in_osc0_f * mul / (div * (1 << div2_en)); in pm_configure_clocks()
138 , div // div in pm_configure_clocks()
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl616/std/src/
A Dbl616_clock.c230 uint32_t div = 0; in Clock_F32k_Mux_Output() local
393 uint32_t div = 0; in Clock_System_Clock_Get() local
462 uint32_t div = 0; in Clock_Get_PSRAMB_Clk() local
749 uint32_t div = 0; in Clock_GPADC_Clk_Mux_Output() local
904 uint32_t div = 0; in Clock_Audio_ADC_Clock_Get() local
907 div = Clock_Get_ADC_Div_Val(); in Clock_Audio_ADC_Clock_Get()
909 return clock / (div + 1); in Clock_Audio_ADC_Clock_Get()
924 uint32_t div = 0; in Clock_Peripheral_Clock_Get() local
1122 CHECK_PARAM((div <= 0x3FF)); in CPU_Set_MTimer_CLK()
1208 uint32_t div = 0; in CPU_Get_MTimer_Clock() local
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/bsp/nxp/lpc/lpc43xx/Libraries/Device/NXP/LPC43xx/Source/Templates/
A Dsystem_LPC43xx.c496 #define EMC_NANOSEC(ns, freq, div) (((uint64_t)(ns) * ((freq)/((div)+1)))/1000000000) argument
524 uint32_t div, n; in SystemInit_ExtMemCtl() local
629 div = 0; in SystemInit_ExtMemCtl()
632 div = 1; in SystemInit_ExtMemCtl()
745 uint32_t div, mul; in GetPLL1Param() local
748 div = ((ctrl >> 12) & 0x03) + 1; in GetPLL1Param()
755 div *= (2*p); in GetPLL1Param()
762 div *= (2*p); in GetPLL1Param()
765 return ((div << 8) | (mul)); in GetPLL1Param()
814 uint32_t div = 1; in GetClockFreq() local
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/bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/
A Dsystem_LPC43xx.c496 #define EMC_NANOSEC(ns, freq, div) (((uint64_t)(ns) * ((freq)/((div)+1)))/1000000000) argument
524 uint32_t div, n; in SystemInit_ExtMemCtl() local
629 div = 0; in SystemInit_ExtMemCtl()
632 div = 1; in SystemInit_ExtMemCtl()
744 uint32_t div, mul; in GetPLL1Param() local
747 div = ((ctrl >> 12) & 0x03) + 1; in GetPLL1Param()
754 div *= (2*p); in GetPLL1Param()
761 div *= (2*p); in GetPLL1Param()
764 return ((div << 8) | (mul)); in GetPLL1Param()
813 uint32_t div = 1; in GetClockFreq() local
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/bsp/efm32/Libraries/emlib/src/
A Dem_cmu.c124 EFM_ASSERT((div>0) && (div <= 32768)); in CMU_DivToLog2()
750 EFM_ASSERT((div>=cmuClkDiv_1) && (div<=cmuClkDiv_8)); in CMU_ClockDivSet()
769 EFM_ASSERT((div >= cmuClkDiv_1) && (div <= cmuClkDiv_512)); in CMU_ClockDivSet()
771 div = CMU_DivToLog2(div); in CMU_ClockDivSet()
783 div = CMU_DivToLog2(div); in CMU_ClockDivSet()
806 div = CMU_DivToLog2(div); in CMU_ClockDivSet()
820 div = CMU_DivToLog2(div); in CMU_ClockDivSet()
835 div = CMU_DivToLog2(div); in CMU_ClockDivSet()
850 div = CMU_DivToLog2(div); in CMU_ClockDivSet()
874 div = CMU_DivToLog2(div); in CMU_ClockDivSet()
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/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/
A Dclk_periph.c427 div = round_rate; in sunxi_clk_periph_round_rate()
428 if (!div) in sunxi_clk_periph_round_rate()
448 if (div <= div_m) in sunxi_clk_periph_round_rate()
456 div = div >> 1; in sunxi_clk_periph_round_rate()
459 if (!div) in sunxi_clk_periph_round_rate()
470 factor_m = (div > div_m ? div_m : div) - 1; in sunxi_clk_periph_round_rate()
496 div = tmp_rate; in sunxi_clk_periph_set_rate()
498 if (!div) in sunxi_clk_periph_set_rate()
522 div = div >> 1; in sunxi_clk_periph_set_rate()
524 if (!div) in sunxi_clk_periph_set_rate()
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/bsp/allwinner/libraries/sunxi-hal/hal/source/prcm/prcm-sun50iw11/
A Dmclk.c712 if (div < 33) { in calc_clk_audio_ratio_nm()
714 } else if (div < 65) { in calc_clk_audio_ratio_nm()
716 } else if (div < 129) { in calc_clk_audio_ratio_nm()
718 } else if (div < 257) { in calc_clk_audio_ratio_nm()
732 if (div < 17) { in calc_clk_ratio_nm()
734 *m = div; in calc_clk_ratio_nm()
735 } else if (div < 33) { in calc_clk_ratio_nm()
737 *m = (div + 1) / 2; in calc_clk_ratio_nm()
738 } else if (div < 65) { in calc_clk_ratio_nm()
740 *m = (div + 3) / 4; in calc_clk_ratio_nm()
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/bsp/tae32f5300/Libraries/TAE32F53xx_StdPeriph_Driver/src/
A Dtae32f53xx_ll_sysctrl.c271 if (div <= SYSCTRL_CLK_DIV_IVD || div > SYSCTRL_CLK_DIV_256) { in LL_SYSCTRL_GPIOA_DbcClkCfg()
278 __LL_SYSCTRL_GPIOADbcClkDiv_Set(SYSCTRL, div); in LL_SYSCTRL_GPIOA_DbcClkCfg()
292 if (div <= SYSCTRL_CLK_DIV_IVD || div > SYSCTRL_CLK_DIV_256) { in LL_SYSCTRL_GPIOB_DbcClkCfg()
299 __LL_SYSCTRL_GPIOBDbcClkDiv_Set(SYSCTRL, div); in LL_SYSCTRL_GPIOB_DbcClkCfg()
313 if (div <= SYSCTRL_CLK_DIV_IVD || div > SYSCTRL_CLK_DIV_256) { in LL_SYSCTRL_GPIOC_DbcClkCfg()
334 if (div <= SYSCTRL_CLK_DIV_IVD || div > SYSCTRL_CLK_DIV_256) { in LL_SYSCTRL_GPIOD_DbcClkCfg()
355 if (div <= SYSCTRL_CLK_DIV_IVD || div > SYSCTRL_CLK_DIV_16) { in LL_SYSCTRL_DFLASH_ClkCfg()
376 if (div <= SYSCTRL_CLK_DIV_IVD || div > SYSCTRL_CLK_DIV_16) { in LL_SYSCTRL_EFLASH_ClkCfg()
397 if (div <= SYSCTRL_CLK_DIV_IVD || div > SYSCTRL_CLK_DIV_4) { in LL_SYSCTRL_ADC_FuncClkCfg()
404 __LL_SYSCTRL_ADCFunClkDiv_Set(SYSCTRL, div); in LL_SYSCTRL_ADC_FuncClkCfg()
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/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/
A Dbflb_spi.c15 uint32_t div; in bflb_spi_init() local
29 div = (div) ? (div - 1) : 0; in bflb_spi_init()
30 div = (div > 0xff) ? 0xff : div; in bflb_spi_init()
33 regval |= div << SPI_CR_SPI_PRD_D_PH_0_SHIFT; in bflb_spi_init()
34 regval |= div << SPI_CR_SPI_PRD_D_PH_1_SHIFT; in bflb_spi_init()
35 regval |= div << SPI_CR_SPI_PRD_S_SHIFT; in bflb_spi_init()
36 regval |= div << SPI_CR_SPI_PRD_P_SHIFT; in bflb_spi_init()
41 regval |= (div) << SPI_CR_SPI_PRD_I_SHIFT; in bflb_spi_init()
519 uint32_t div; in bflb_spi_feature_control() local
634 div = (div) ? (div - 1) : 0; in bflb_spi_feature_control()
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/bsp/rockchip/rk3500/driver/clk/
A Dclk-rk3588.c1725 int src_clk, div; in rk3588_mmc_set_clk() local
1838 rt_uint32_t div; in rk3588_aux16m_set_clk() local
1920 int src_clk, div; in rk3588_aclk_vop_set_clk() local
1929 div = 1; in rk3588_aclk_vop_set_clk()
1933 div = 2; in rk3588_aclk_vop_set_clk()
1937 div = 1; in rk3588_aclk_vop_set_clk()
2185 int div; in rk3588_gmac_set_clk() local
2308 div = 2; in rk3588_uart_set_rate()
2312 div = 2; in rk3588_uart_set_rate()
2413 div = 1; in rk3588_pciephy_set_rate()
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/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_uart_drv.c61 uint16_t div, osc, delta; in uart_calculate_baudrate() local
75 div = (uint16_t)(tmp / osc); in uart_calculate_baudrate()
80 if (div * osc > tmp) { in uart_calculate_baudrate()
82 } else if (div * osc < tmp) { in uart_calculate_baudrate()
88 *div_out = div; in uart_calculate_baudrate()
100 uint16_t div; in uart_init() local
113 ptr->DLL = UART_DLL_DLL_SET(div >> 0); in uart_init()
114 ptr->DLM = UART_DLM_DLM_SET(div >> 8); in uart_init()
201 uint16_t div; in uart_set_baudrate() local
211 ptr->DLL = UART_DLL_DLL_SET(div >> 0); in uart_set_baudrate()
[all …]
/bsp/core-v-mcu/Libraries/core_v_hal_libraries/core_v_hal/source/
A Dhal_fll_pi.c64 uint32_t *div) in fll_get_mult_div_from_frequency() argument
75 *div = D + 1; in fll_get_mult_div_from_frequency()
79 static uint32_t fll_get_frequency_from_mult_div(uint32_t mult, uint32_t div) in fll_get_frequency_from_mult_div() argument
83 uint32_t fres = (div == 0) ? (fref * mult) : (fref * mult) >> (div - 1); in fll_get_frequency_from_mult_div()
89 uint32_t mult, div; in pi_fll_set_frequency() local
95 fll_get_mult_div_from_frequency(frequency, &mult, &div); in pi_fll_set_frequency()
104 reg1 |= FLL_CTRL_CONF1_CLK_OUT_DIV(div); in pi_fll_set_frequency()
A Dhal_fll.c59 unsigned int *div) in __rt_fll_get_mult_div_from_freq() argument
85 *div = D + 1; in __rt_fll_get_mult_div_from_freq()
90 unsigned int div) in __rt_fll_get_freq_from_mult_div() argument
94 unsigned int fres = (fref * mult) >> (div - 1); in __rt_fll_get_freq_from_mult_div()
188 unsigned int real_freq, mult, div; in __rt_fll_set_freq() local
189 real_freq = __rt_fll_get_mult_div_from_freq(frequency, &mult, &div); in __rt_fll_set_freq()
200 reg1.clock_out_divider = div; in __rt_fll_set_freq()
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_pllctl_drv.h161 uint8_t spread, uint8_t div, in pllctl_pll_ss_enable() argument
166 || (div > (PLLCTL_PLL_CFG0_SS_DIVVAL_MASK >> PLLCTL_PLL_CFG0_SS_DIVVAL_SHIFT))) { in pllctl_pll_ss_enable()
179 | PLLCTL_PLL_CFG0_SS_DIVVAL_SET(div) in pllctl_pll_ss_enable()
195 static inline hpm_stat_t pllctl_set_postdiv1(PLLCTL_Type *ptr, uint8_t pll, uint8_t div) in pllctl_set_postdiv1() argument
198 || (!div) in pllctl_set_postdiv1()
199 || ((div) > (PLLCTL_PLL_CFG0_POSTDIV1_MASK >> PLLCTL_PLL_CFG0_POSTDIV1_SHIFT))) { in pllctl_set_postdiv1()
306 …ic inline hpm_stat_t pllctl_set_div(PLLCTL_Type *ptr, uint8_t pll, uint8_t div_index, uint16_t div) in pllctl_set_div() argument
310 || ((div - 1) > (uint16_t) (PLLCTL_PLL_DIV0_DIV_MASK >> PLLCTL_PLL_DIV0_DIV_SHIFT))) { in pllctl_set_div()
316 | PLLCTL_PLL_DIV1_DIV_SET(div - 1); in pllctl_set_div()
319 | PLLCTL_PLL_DIV0_DIV_SET(div - 1); in pllctl_set_div()
[all …]
/bsp/loongson/ls1bdev/drivers/
A Ddisplay_controller.c49 int pll,ctrl,div,div1,frac; in caclulate_freq() local
61 div = clk/(long)PCLK/1000; in caclulate_freq()
64 if (div!=div1) in caclulate_freq()
68 if (div!=div1) in caclulate_freq()
78 if (abs((long)clk/div/1000-PCLK)<abs((long)clk1/(div+1)/1000-PCLK)) in caclulate_freq()
81 ctrl = ctrl&~(0x1f<<26)|(div<<26)|(1<<31); in caclulate_freq()
86 ctrl = ctrl&~(0x1f<<26)|((div+1)<<26)|(1<<31); in caclulate_freq()
/bsp/nxp/lpc/lpc5410x/drivers/
A Ddrv_uart.c52 baud.mul = baud.div = 0; in lpc_configure()
65 UART_cfg.div = baud.div; /* Use the calculated div value */ in lpc_configure()
71 uart->UART->BRG = (UART_cfg.div - 1) & 0xFFFF; in lpc_configure()
262 if (!ub->div) { in _UART_CalcDiv()
274 ub->div = tmp - 1; in _UART_CalcDiv()
285 ub->div += ub->clk / (ub->baud * ub->ovr); in _UART_CalcDiv()
286 if (!ub->div) { in _UART_CalcDiv()
290 ub->baud = ub->clk / (ub->div * ub->ovr); in _UART_CalcDiv()
317 ub->div = tmp - 1; in _UART_CalcMul()
/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/
A Dlib_uart.c69 uint32_t div; in UART_Init() local
92 div = pclk/InitStruct->Baudrate; in UART_Init()
96 div++; in UART_Init()
99 UARTx->BAUDDIV = div; in UART_Init()
284 uint32_t div; in UART_BaudrateConfig() local
291 div = pclk/BaudRate; in UART_BaudrateConfig()
294 div++; in UART_BaudrateConfig()
297 UARTx->BAUDDIV = div; in UART_BaudrateConfig()

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