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Searched refs:divider (Results 1 – 25 of 77) sorted by relevance

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/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/
A Dclk_periph.c376 divider = &periph->divider; in sunxi_clk_periph_recalc_rate()
379 if (!divider->reg) in sunxi_clk_periph_recalc_rate()
389 if (divider->mwidth) in sunxi_clk_periph_recalc_rate()
391 div_m = GET_BITS(divider->mshift, divider->mwidth, reg); in sunxi_clk_periph_recalc_rate()
395 div_n = GET_BITS(divider->nshift, divider->nwidth, reg); in sunxi_clk_periph_recalc_rate()
418 divider = &periph->divider; in sunxi_clk_periph_round_rate()
490 divider = &periph->divider; in sunxi_clk_periph_set_rate()
542 …vider->reg %d divider->mwidth %d divider->nshift %d \n", divider->reg, divider->mwidth, divider->n… in sunxi_clk_periph_set_rate()
543 if (!divider->reg) in sunxi_clk_periph_set_rate()
550 reg = SET_BITS(divider->mshift, divider->mwidth, reg, div_m); in sunxi_clk_periph_set_rate()
[all …]
/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi-ng/
A Dclk-divider.c23 return readl(divider->reg); in clk_div_readl()
28 writel(val, divider->reg); in clk_div_writel()
182 val = clk_div_readl(divider) >> divider->shift; in clk_divider_recalc_rate()
186 divider->flags, divider->width); in clk_divider_recalc_rate()
509 val = clk_div_readl(divider) >> divider->shift; in clk_divider_round_rate()
513 divider->width, divider->flags, in clk_divider_round_rate()
518 divider->width, divider->flags); in clk_divider_round_rate()
548 divider->width, divider->flags); in clk_divider_set_rate()
558 val = clk_div_mask(divider->width) << (divider->shift + 16); in clk_divider_set_rate()
563 val &= ~(clk_div_mask(divider->width) << divider->shift); in clk_divider_set_rate()
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/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_clock.c397 uint32_t divider = 0U; in CLOCK_GetSysOscAsyncFreq() local
417 if (divider) in CLOCK_GetSysOscAsyncFreq()
419 return oscFreq >> (divider - 1U); in CLOCK_GetSysOscAsyncFreq()
498 uint32_t divider = 0U; in CLOCK_GetSircAsyncFreq() local
518 if (divider) in CLOCK_GetSircAsyncFreq()
520 return sircFreq >> (divider - 1U); in CLOCK_GetSircAsyncFreq()
623 uint32_t divider = 0U; in CLOCK_GetFircAsyncFreq() local
643 if (divider) in CLOCK_GetFircAsyncFreq()
645 return fircFreq >> (divider - 1U); in CLOCK_GetFircAsyncFreq()
769 uint32_t divider = 0U; in CLOCK_GetLpFllAsyncFreq() local
[all …]
A Dfsl_clock.h1139 reg = (reg & ~SCG_SOSCDIV_SOSCDIV3_MASK) | SCG_SOSCDIV_SOSCDIV3(divider); in CLOCK_SetSysOscAsyncClkDiv()
1142 reg = (reg & ~SCG_SOSCDIV_SOSCDIV2_MASK) | SCG_SOSCDIV_SOSCDIV2(divider); in CLOCK_SetSysOscAsyncClkDiv()
1145 reg = (reg & ~SCG_SOSCDIV_SOSCDIV1_MASK) | SCG_SOSCDIV_SOSCDIV1(divider); in CLOCK_SetSysOscAsyncClkDiv()
1265 reg = (reg & ~SCG_SIRCDIV_SIRCDIV3_MASK) | SCG_SIRCDIV_SIRCDIV3(divider); in CLOCK_SetSircAsyncClkDiv()
1268 reg = (reg & ~SCG_SIRCDIV_SIRCDIV2_MASK) | SCG_SIRCDIV_SIRCDIV2(divider); in CLOCK_SetSircAsyncClkDiv()
1271 reg = (reg & ~SCG_SIRCDIV_SIRCDIV1_MASK) | SCG_SIRCDIV_SIRCDIV1(divider); in CLOCK_SetSircAsyncClkDiv()
1353 reg = (reg & ~SCG_FIRCDIV_FIRCDIV3_MASK) | SCG_FIRCDIV_FIRCDIV3(divider); in CLOCK_SetFircAsyncClkDiv()
1356 reg = (reg & ~SCG_FIRCDIV_FIRCDIV2_MASK) | SCG_FIRCDIV_FIRCDIV2(divider); in CLOCK_SetFircAsyncClkDiv()
1359 reg = (reg & ~SCG_FIRCDIV_FIRCDIV1_MASK) | SCG_FIRCDIV_FIRCDIV1(divider); in CLOCK_SetFircAsyncClkDiv()
1513 reg = (reg & ~SCG_LPFLLDIV_LPFLLDIV2_MASK) | SCG_LPFLLDIV_LPFLLDIV2(divider); in CLOCK_SetLpFllAsyncClkDiv()
[all …]
/bsp/frdm-k64f/device/MK64F12/
A Dfsl_cmt.c106 config->divider = kCMT_SecondClkDiv1; in CMT_GetDefaultConfig()
114 uint8_t divider; in CMT_Init() local
124 divider = base->MSC; in CMT_Init()
125 divider &= ~CMT_MSC_CMTDIV_MASK; in CMT_Init()
126 divider |= CMT_MSC_CMTDIV(config->divider); in CMT_Init()
127 base->MSC = divider; in CMT_Init()
216 uint32_t divider; in CMT_GetCMTFrequency() local
222 divider = ((base->MSC & CMT_MSC_CMTDIV_MASK) >> CMT_MSC_CMTDIV_SHIFT); in CMT_GetCMTFrequency()
224 switch ((cmt_second_clkdiv_t)divider) in CMT_GetCMTFrequency()
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_rcm.c559 uint32_t divider; in RCM_ReadHCLKFreq() local
564 divider = AHBPrescTable[RCM->CFG_B.AHBPSC]; in RCM_ReadHCLKFreq()
565 hclk = sysClk >> divider; in RCM_ReadHCLKFreq()
581 uint32_t hclk, divider; in RCM_ReadPCLKFreq() local
588 divider = APBPrescTable[RCM->CFG_B.APB1PSC]; in RCM_ReadPCLKFreq()
589 *PCLK1 = hclk >> divider; in RCM_ReadPCLKFreq()
594 divider = APBPrescTable[RCM->CFG_B.APB2PSC]; in RCM_ReadPCLKFreq()
595 *PCLK2 = hclk >> divider; in RCM_ReadPCLKFreq()
608 uint32_t adcClk, pclk2, divider; in RCM_ReadADCCLKFreq() local
614 divider = ADCPrescTable[RCM->CFG_B.ADCPSC]; in RCM_ReadADCCLKFreq()
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/bsp/apm32/libraries/APM32S10x_Library/APM32S10x_StdPeriphDriver/src/
A Dapm32s10x_rcm.c544 uint32_t divider; in RCM_ReadHCLKFreq() local
549 divider = AHBPrescTable[RCM->CFG_B.AHBPSC]; in RCM_ReadHCLKFreq()
550 hclk = sysClk >> divider; in RCM_ReadHCLKFreq()
566 uint32_t hclk, divider; in RCM_ReadPCLKFreq() local
573 divider = APBPrescTable[RCM->CFG_B.APB1PSC]; in RCM_ReadPCLKFreq()
574 *PCLK1 = hclk >> divider; in RCM_ReadPCLKFreq()
579 divider = APBPrescTable[RCM->CFG_B.APB2PSC]; in RCM_ReadPCLKFreq()
580 *PCLK2 = hclk >> divider; in RCM_ReadPCLKFreq()
593 uint32_t adcClk, pclk2, divider; in RCM_ReadADCCLKFreq() local
599 divider = ADCPrescTable[RCM->CFG_B.ADCPSC]; in RCM_ReadADCCLKFreq()
[all …]
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/
A Dapm32f10x_rcm.c798 uint32_t divider; in RCM_ReadHCLKFreq() local
803 divider = AHBPrescTable[RCM->CFG_B.AHBPSC]; in RCM_ReadHCLKFreq()
804 hclk = sysClk >> divider; in RCM_ReadHCLKFreq()
820 uint32_t hclk, divider; in RCM_ReadPCLKFreq() local
827 divider = APBPrescTable[RCM->CFG_B.APB1PSC]; in RCM_ReadPCLKFreq()
828 *PCLK1 = hclk >> divider; in RCM_ReadPCLKFreq()
833 divider = APBPrescTable[RCM->CFG_B.APB2PSC]; in RCM_ReadPCLKFreq()
834 *PCLK2 = hclk >> divider; in RCM_ReadPCLKFreq()
847 uint32_t adcClk, pclk2, divider; in RCM_ReadADCCLKFreq() local
853 divider = ADCPrescTable[RCM->CFG_B.ADCPSC]; in RCM_ReadADCCLKFreq()
[all …]
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd20/
A Dclock_feature.h920 const enum system_main_clock_div divider) in system_cpu_clock_set_divider() argument
922 Assert(((uint32_t)divider & PM_CPUSEL_CPUDIV_Msk) == divider); in system_cpu_clock_set_divider()
923 PM->CPUSEL.reg = (uint32_t)divider; in system_cpu_clock_set_divider()
955 const enum system_main_clock_div divider) in system_apb_clock_set_divider() argument
959 PM->APBASEL.reg = (uint32_t)divider; in system_apb_clock_set_divider()
962 PM->APBBSEL.reg = (uint32_t)divider; in system_apb_clock_set_divider()
965 PM->APBCSEL.reg = (uint32_t)divider; in system_apb_clock_set_divider()
A Dgclk.c321 uint32_t divider = GCLK->GENDIV.bit.DIV; in system_gclk_gen_get_hz() local
326 if (!divsel && divider > 1) { in system_gclk_gen_get_hz()
327 gen_input_hz /= divider; in system_gclk_gen_get_hz()
329 gen_input_hz >>= (divider+1); in system_gclk_gen_get_hz()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/
A Dclock_feature.h922 const enum system_main_clock_div divider) in system_cpu_clock_set_divider() argument
924 Assert(((uint32_t)divider & PM_CPUSEL_CPUDIV_Msk) == divider); in system_cpu_clock_set_divider()
925 PM->CPUSEL.reg = (uint32_t)divider; in system_cpu_clock_set_divider()
957 const enum system_main_clock_div divider) in system_apb_clock_set_divider() argument
961 PM->APBASEL.reg = (uint32_t)divider; in system_apb_clock_set_divider()
964 PM->APBBSEL.reg = (uint32_t)divider; in system_apb_clock_set_divider()
967 PM->APBCSEL.reg = (uint32_t)divider; in system_apb_clock_set_divider()
A Dgclk.c321 uint32_t divider = GCLK->GENDIV.bit.DIV; in system_gclk_gen_get_hz() local
326 if (!divsel && divider > 1) { in system_gclk_gen_get_hz()
327 gen_input_hz /= divider; in system_gclk_gen_get_hz()
329 gen_input_hz >>= (divider+1); in system_gclk_gen_get_hz()
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/src/
A Dapm32f4xx_rcm.c560 uint32_t divider; in RCM_ReadHCLKFreq() local
565 divider = AHBPrescTable[RCM->CFG_B.AHBPSC]; in RCM_ReadHCLKFreq()
566 hclk = sysClk >> divider; in RCM_ReadHCLKFreq()
582 uint32_t hclk, divider; in RCM_ReadPCLKFreq() local
589 divider = APBPrescTable[RCM->CFG_B.APB1PSC]; in RCM_ReadPCLKFreq()
590 *PCLK1 = hclk >> divider; in RCM_ReadPCLKFreq()
595 divider = APBPrescTable[RCM->CFG_B.APB2PSC]; in RCM_ReadPCLKFreq()
596 *PCLK2 = hclk >> divider; in RCM_ReadPCLKFreq()
/bsp/cvitek/drivers/
A Ddrv_sdhci.c49 uint32_t divider = 1U; in sdhci_set_card_clock() local
56 divider = 0; in sdhci_set_card_clock()
60 for (divider = 0x1; divider < 0x3FF; divider++) in sdhci_set_card_clock()
66 if(divider == 0x3FF) in sdhci_set_card_clock()
72 RT_ASSERT(divider <= 0x3FF); in sdhci_set_card_clock()
83 …(mmio_read_16(BASE + SDIF_CLK_CTRL) & 0x3F) | ((divider & 0xff) << 8) | ((divider & 0x300) >> 2));… in sdhci_set_card_clock()
125 uint32_t divider = 1U; in SDIF_ChangeCardClock() local
137 divider = 0; in SDIF_ChangeCardClock()
141 for (divider = 0x1; divider < 0x3FF; divider++) in SDIF_ChangeCardClock()
147 if(divider == 0x3FF) in SDIF_ChangeCardClock()
[all …]
/bsp/microchip/saml10/bsp/hpl/oscctrl/
A Dhpl_oscctrl.c106 uint8_t divider in _oscctrl_init_referenced_generators() local
109 uint8_t divider in _oscctrl_init_referenced_generators() local
113 tmp = (OSCCTRL_DFLLULPCTRL_DIV(divider) | (CONF_DFLL_RUNSTDBY << OSCCTRL_DFLLULPCTRL_RUNSTDBY_Pos) in _oscctrl_init_referenced_generators()
/bsp/samd21/sam_d2x_asflib/common/services/clock/
A Dgenclk.h186 …tic inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider) in genclk_enable_config() argument
193 genclk_config_set_divider(&gcfg, divider); in genclk_enable_config()
/bsp/nxp/imx/imxrt/libraries/drivers/
A Dbsp_wm8960.c446 uint32_t divider = 0; in WM8960_ConfigDataFormat() local
450 divider = sysclk / sample_rate; in WM8960_ConfigDataFormat()
451 if (divider == 256) in WM8960_ConfigDataFormat()
455 if (divider > 256) in WM8960_ConfigDataFormat()
457 val = (((divider / 256U) << 6U) | ((divider / 256U) << 3U)); in WM8960_ConfigDataFormat()
463 divider /= bits * 2; in WM8960_ConfigDataFormat()
464 switch (divider) in WM8960_ConfigDataFormat()
469 val = (0x1C0 | divider); in WM8960_ConfigDataFormat()
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/
A Dft32f0xx_usart.c77 uint32_t divider = 0, apbclock = 0, tmpreg = 0; in USART_Init() local
148 divider = (uint32_t)((2 * apbclock) / (USART_InitStruct->USART_BaudRate)); in USART_Init()
154 divider = (uint32_t)((apbclock) / (USART_InitStruct->USART_BaudRate)); in USART_Init()
161 divider++; in USART_Init()
168 tmpreg = (divider & (uint16_t)0x000F) >> 1; in USART_Init()
171 divider = (divider & (uint16_t)0xFFF0) | tmpreg; in USART_Init()
175 USARTx->BRR = (uint16_t)divider; in USART_Init()
/bsp/raspberry-pi/raspi4-64/drivers/
A Ddrv_spi.c79 rt_uint16_t divider; in raspi_spi_configure() local
103 divider = (rt_uint16_t) ((rt_uint32_t) RPI_CORE_CLK_HZ / cfg->max_hz); in raspi_spi_configure()
104 divider &= 0xFFFE; in raspi_spi_configure()
106 SPI_REG_CLK(hwcfg->hw_base) = divider; in raspi_spi_configure()
/bsp/raspberry-pi/raspi3-32/driver/
A Ddrv_spi.c63 rt_uint16_t divider; in raspi_spi_configure() local
81 divider = (rt_uint16_t) ((rt_uint32_t) RPI_CORE_CLK_HZ / cfg->max_hz); in raspi_spi_configure()
82 divider &= 0xFFFE; in raspi_spi_configure()
84 BCM283X_SPI0_CLK(BCM283X_SPI0_BASE) = divider; in raspi_spi_configure()
A Ddrv_i2c.c175 rt_uint32_t divider = (BCM283X_CORE_CLK_HZ / 10000) & 0xFFFE; in raspi_i2c_configure() local
176 BCM283X_BSC_DIV(base) = (rt_uint16_t) divider; in raspi_i2c_configure()
177 i2c_byte_wait_us = (divider * 1000000 * 9 / BCM283X_CORE_CLK_HZ); in raspi_i2c_configure()
/bsp/raspberry-pi/raspi3-64/driver/
A Ddrv_spi.c64 rt_uint16_t divider; in raspi_spi_configure() local
82 divider = (rt_uint16_t) ((rt_uint32_t) RPI_CORE_CLK_HZ / cfg->max_hz); in raspi_spi_configure()
83 divider &= 0xFFFE; in raspi_spi_configure()
85 BCM283X_SPI0_CLK(BCM283X_SPI0_BASE) = divider; in raspi_spi_configure()
A Ddrv_i2c.c179 rt_uint32_t divider = (BCM283X_CORE_CLK_HZ / 10000) & 0xFFFE; in raspi_i2c_configure() local
180 BCM283X_BSC_DIV(base) = (rt_uint16_t) divider; in raspi_i2c_configure()
181 i2c_byte_wait_us = (divider * 1000000 * 9 / BCM283X_CORE_CLK_HZ); in raspi_i2c_configure()
/bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/
A Dapm32f0xx_rcm.c756 uint32_t divider; in RCM_ReadHCLKFreq() local
761 divider = AHBPrescTable[RCM->CFG1_B.AHBPSC]; in RCM_ReadHCLKFreq()
762 hclk = sysClk >> divider; in RCM_ReadHCLKFreq()
776 uint32_t hclk, pclk, divider; in RCM_ReadPCLKFreq() local
781 divider = APBPrescTable[RCM->CFG1_B.APB1PSC]; in RCM_ReadPCLKFreq()
782 pclk = hclk >> divider; in RCM_ReadPCLKFreq()
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/src/
A Dhk32f0xx_usart.c170 uint32_t divider = 0, apbclock = 0, tmpreg = 0; in USART_Init() local
245 divider = (uint32_t)((2 * apbclock) / (USART_InitStruct->USART_BaudRate)); in USART_Init()
251 divider = (uint32_t)((apbclock) / (USART_InitStruct->USART_BaudRate)); in USART_Init()
258 divider++; in USART_Init()
265 tmpreg = (divider & (uint16_t)0x000F) >> 1; in USART_Init()
268 divider = (divider & (uint16_t)0xFFF0) | tmpreg; in USART_Init()
272 USARTx->BRR = (uint16_t)divider; in USART_Init()

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