Searched refs:dma_status (Results 1 – 7 of 7) sorted by relevance
467 uint32_t dma_status; in dma_check_transfer_status() local469 dma_status = 0; in dma_check_transfer_status()472 dma_status |= DMA_CHANNEL_STATUS_TC; in dma_check_transfer_status()477 dma_status |= DMA_CHANNEL_STATUS_ERROR; in dma_check_transfer_status()482 dma_status |= DMA_CHANNEL_STATUS_ABORT; in dma_check_transfer_status()485 if (dma_status == 0) { in dma_check_transfer_status()486 dma_status = DMA_CHANNEL_STATUS_ONGOING; in dma_check_transfer_status()488 return dma_status; in dma_check_transfer_status()
595 uint32_t dma_status = 0; in dma_check_transfer_status() local598 dma_status |= DMA_CHANNEL_STATUS_TC; in dma_check_transfer_status()602 dma_status |= DMA_CHANNEL_STATUS_HALF_TC; in dma_check_transfer_status()606 dma_status |= DMA_CHANNEL_STATUS_ERROR; in dma_check_transfer_status()610 dma_status |= DMA_CHANNEL_STATUS_ABORT; in dma_check_transfer_status()613 if (dma_status == 0) { in dma_check_transfer_status()614 dma_status = DMA_CHANNEL_STATUS_ONGOING; in dma_check_transfer_status()616 return dma_status; in dma_check_transfer_status()
147 uint32_t dma_status; in dw_gmac_handler_irq() local155 dma_status = dma_reg->status; in dw_gmac_handler_irq()158 dma_reg->status = dma_status & 0x1ffff; in dw_gmac_handler_irq()160 if (dma_status & CVI_DMA_STATUS_RI) in dw_gmac_handler_irq()168 if (dma_status & CVI_DMA_STATUS_TI) in dw_gmac_handler_irq()173 if (dma_status & CVI_DMA_STATUS_ERI) in dw_gmac_handler_irq()
182 enum dma_status { enum286 enum dma_status hal_dma_tx_status(struct sunxi_dma_chan *chan, uint32_t *left_size);
94 static inline enum dma_status dmaengine_tx_status(struct dma_chan *chan, in dmaengine_tx_status()
121 enum dma_status status; in snd_dmaengine_pcm_pointer()
621 enum dma_status hal_dma_tx_status(struct sunxi_dma_chan *chan, uint32_t *left_size) in hal_dma_tx_status()625 enum dma_status status = DMA_INVALID_PARAMETER; in hal_dma_tx_status()
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