1 /** @file emif.h 2 * @brief emif Driver Definition File 3 * @date 29.May.2013 4 * @version 03.05.02 5 * 6 */ 7 8 /* (c) Texas Instruments 2009-2013, All rights reserved. */ 9 10 #ifndef _EMIF_H_ 11 #define _EMIF_H_ 12 13 #include "reg_emif.h" 14 15 16 17 /** @enum emif_pins 18 * @brief Alias for emif pins 19 * 20 */ 21 enum emif_pins 22 { 23 emif_wait_pin0 = 0U, 24 emif_wait_pin1 = 1U 25 }; 26 27 28 /** @enum emif_size 29 * @brief Alias for emif page size 30 * 31 */ 32 enum emif_size 33 { 34 elements_256 = 0U, 35 elements_512 = 1U, 36 elements_1024 = 2U, 37 elements_2048 = 3U 38 }; 39 40 /** @enum emif_port 41 * @brief Alias for emif port 42 * 43 */ 44 enum emif_port 45 { 46 emif_8_bit_port = 0U, 47 emif_16_bit_port = 1U 48 }; 49 50 51 /** @enum emif_pagesize 52 * @brief Alias for emif pagesize 53 * 54 */ 55 enum emif_pagesize 56 { 57 emif_4_words = 0U, 58 emif_8_words = 1U 59 }; 60 61 /** @enum emif_wait_polarity 62 * @brief Alias for emif wait polarity 63 * 64 */ 65 enum emif_wait_polarity 66 { 67 emif_pin_low = 0U, 68 emif_pin_high = 1U 69 }; 70 71 72 #define PTR (uint32 *)(0x80000000U) 73 74 /** 75 * @defgroup EMIF EMIF 76 * @brief Error Signaling Module. 77 * 78 * This EMIF memory controller is compliant with the JESD21-C SDR SDRAM memories utilizing a 16-bit 79 * data bus. The purpose of this EMIF is to provide a means for the CPU to connect to a variety of external 80 * devices including: 81 * - Single data rate (SDR) SDRAM 82 * - Asynchronous devices including NOR Flash and SRAM 83 * The most common use for the EMIF is to interface with both a flash device and an SDRAM device 84 * simultaneously. contains an example of operating the EMIF in this configuration. 85 * 86 * Related Files 87 * - reg_emif.h 88 * - emif.h 89 * - emif.c 90 * @addtogroup EMIF 91 * @{ 92 */ 93 /* EMIF Interface Functions */ 94 95 void emif_SDRAMInit(void); 96 void emif_ASYNC1Init(void); 97 void emif_ASYNC2Init(void); 98 void emif_ASYNC3Init(void); 99 100 /**@}*/ 101 #endif /*EMIF_H_*/ 102