1 /* 2 * Allwinner SoCs display driver. 3 * 4 * Copyright (C) 2016 Allwinner. 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11 /******************************************************************************* 12 * All Winner Tech, All Right Reserved. 2014-2015 Copyright (c) 13 * 14 * File name : de_fcc_type.h 15 * 16 * Description : display engine 2.0 fcc base struct declaration 17 * 18 * History : 2014/03/28 iptang v0.1 Initial version 19 * 20 ******************************************************************************/ 21 22 #ifndef __DE_FCC_TYPE__ 23 #define __DE_FCC_TYPE__ 24 25 #include "de_rtmx.h" 26 27 #define FCC_PARA_NUM 6 28 #define FCC_MODE_NUM 3 29 30 union FCC_CTRL_REG { 31 unsigned int dwval; 32 struct { 33 unsigned int en:1; 34 unsigned int res0:7; 35 unsigned int win_en:1; 36 unsigned int res1:23; 37 } bits; 38 }; 39 40 union FCC_SIZE_REG { 41 unsigned int dwval; 42 struct { 43 unsigned int width:13; 44 unsigned int res0:3; 45 unsigned int height:13; 46 unsigned int res1:3; 47 } bits; 48 }; 49 50 union FCC_WIN0_REG { 51 unsigned int dwval; 52 struct { 53 unsigned int left:13; 54 unsigned int res0:3; 55 unsigned int top:13; 56 unsigned int res1:3; 57 } bits; 58 }; 59 60 union FCC_WIN1_REG { 61 unsigned int dwval; 62 struct { 63 unsigned int right:13; 64 unsigned int res0:3; 65 unsigned int bot:13; 66 unsigned int res1:3; 67 } bits; 68 }; 69 70 union FCC_HUE_RANGE_REG { 71 unsigned int dwval; 72 struct { 73 unsigned int hmin:12; 74 unsigned int res0:4; 75 unsigned int hmax:12; 76 unsigned int res1:4; 77 } bits; 78 }; 79 80 union FCC_HS_GAIN_REG { 81 unsigned int dwval; 82 struct { 83 unsigned int sgain:9; 84 unsigned int res0:7; 85 unsigned int hgain:9; 86 unsigned int res1:7; 87 } bits; 88 }; 89 90 union FCC_CSC_CTL_REG { 91 unsigned int dwval; 92 struct { 93 unsigned int bypass:1; 94 unsigned int res0:31; 95 } bits; 96 }; 97 98 union FCC_CSC_COEFF_REG { 99 unsigned int dwval; 100 struct { 101 unsigned int coff:13; 102 unsigned int res0:19; 103 } bits; 104 }; 105 106 union FCC_CSC_CONST_REG { 107 unsigned int dwval; 108 struct { 109 unsigned int cont:20; 110 unsigned int res0:12; 111 } bits; 112 }; 113 114 union FCC_GLB_APH_REG { 115 unsigned int dwval; 116 struct { 117 unsigned int res0:24; 118 unsigned int alpha:8; 119 } bits; 120 }; 121 122 struct __fcc_reg_t { 123 union FCC_CTRL_REG fcc_ctl; /* 0x00 */ 124 union FCC_SIZE_REG fcc_size; /* 0x04 */ 125 union FCC_WIN0_REG fcc_win0; /* 0x08 */ 126 union FCC_WIN1_REG fcc_win1; /* 0x0c */ 127 union FCC_HUE_RANGE_REG fcc_range[6]; /* 0x10-0x24 */ 128 unsigned int res0[2]; /* 0x28-0x2c */ 129 union FCC_HS_GAIN_REG fcc_gain[6]; /* 0x30-0x44 */ 130 unsigned int res1[2]; /* 0x48-0x4c */ 131 union FCC_CSC_CTL_REG fcc_csc_ctl; /* 0x50 */ 132 unsigned int res2[3]; /* 0x54-0x5c */ 133 union FCC_CSC_COEFF_REG fcc_csc_coff0[3]; /* 0x60-0x68 */ 134 union FCC_CSC_CONST_REG fcc_csc_const0; /* 0x6c */ 135 union FCC_CSC_COEFF_REG fcc_csc_coff1[3]; /* 0x70-0x78 */ 136 union FCC_CSC_CONST_REG fcc_csc_const1; /* 0x7c */ 137 union FCC_CSC_COEFF_REG fcc_csc_coff2[3]; /* 0x80-0x88 */ 138 union FCC_CSC_CONST_REG fcc_csc_const2; /* 0x8c */ 139 union FCC_GLB_APH_REG fcc_glb_alpha; /* 0x90 */ 140 }; 141 142 struct __fcc_config_data { 143 /* ase */ 144 unsigned int fcc_en; 145 unsigned int sgain[6]; 146 147 /* window */ 148 unsigned int win_en; 149 struct de_rect win; 150 }; 151 152 #endif 153