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Searched refs:fcr (Results 1 – 22 of 22) sorted by relevance

/bsp/avr32/software_framework/drivers/flashc/
A Dflashc.c49 unsigned long fcr; member
147 u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; in flashc_set_wait_state()
149 AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; in flashc_set_wait_state()
166 return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0); in flashc_is_ready_int_enabled()
172 u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; in flashc_enable_ready_int()
174 AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; in flashc_enable_ready_int()
180 return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0); in flashc_is_lock_error_int_enabled()
186 u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; in flashc_enable_lock_error_int()
188 AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr; in flashc_enable_lock_error_int()
200 u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr}; in flashc_enable_prog_error_int()
[all …]
/bsp/dm365/applications/
A Dboard.c101 volatile rt_uint32_t fcr; member
116 #define iir fcr
156 UART0->fcr = 0x07; //FIFO in rt_hw_console_init()
/bsp/dm365/drivers/
A Ddavinci_serial.c30 volatile rt_uint32_t fcr; member
45 #define iir fcr
143 UART0->fcr = 0x07; //FIFO in davinci_uart0_init()
194 UART1->fcr = 0x07; //FIFO in davinci_uart1_init()
/bsp/wch/risc-v/Libraries/ch56x_drivers/
A Dch56x_uart.c96 union _uart_fcr fcr; in uart_configure() local
151 fcr.reg = RB_FCR_FIFO_EN | RB_FCR_RX_FIFO_CLR | RB_FCR_TX_FIFO_CLR; in uart_configure()
152 fcr.fifo_trig = UART_1BYTE_TRIG; in uart_configure()
153 uxreg->FCR.reg = fcr.reg; in uart_configure()
/bsp/allwinner/libraries/sunxi-hal/hal/source/uart/
A Dhal_uart.c315 uart_priv->fcr = value; in uart_set_fifo()
316 hal_writeb(uart_priv->fcr, uart_base + UART_FCR); in uart_set_fifo()
360 if (uart_priv->fcr & UART_FCR_FIFO_EN) in uart_force_idle()
369 hal_writeb(uart_priv->fcr, uart_base + UART_FCR); in uart_force_idle()
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/r_sci_uart/
A Dr_sci_uart.c1425 uint32_t fcr = 0U; in r_sci_uart_fifo_cfg() local
1432 fcr |= SCI_UART_FCR_TTRG_DMAC_VALUE << SCI_UART_FCR_TTRG_OFFSET; in r_sci_uart_fifo_cfg()
1450 …fcr |= (((p_instance_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MA… in r_sci_uart_fifo_cfg()
1455 …fcr |= ((p_instance_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFS… in r_sci_uart_fifo_cfg()
1459 p_instance_ctrl->p_reg->FCR = (uint32_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/r_sci_uart/
A Dr_sci_uart.c1425 uint32_t fcr = 0U; in r_sci_uart_fifo_cfg() local
1432 fcr |= SCI_UART_FCR_TTRG_DMAC_VALUE << SCI_UART_FCR_TTRG_OFFSET; in r_sci_uart_fifo_cfg()
1450 …fcr |= (((p_instance_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MA… in r_sci_uart_fifo_cfg()
1455 …fcr |= ((p_instance_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFS… in r_sci_uart_fifo_cfg()
1459 p_instance_ctrl->p_reg->FCR = (uint32_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1420 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1437 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1442 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1446 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1450 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/renesas/ra6m4-cpk/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1367 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1384 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1389 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1393 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1397 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/renesas/ra6m3-ek/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1367 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1384 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1389 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1393 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1397 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/renesas/ra4e2-eco/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1488 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1505 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1510 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1514 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1518 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/renesas/ebf_qi_min_6m5/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1421 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1438 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1443 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1447 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1451 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/renesas/ra2l1-cpk/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1367 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1384 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1389 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1393 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1397 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/renesas/ra4m2-eco/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1421 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1438 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1443 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1447 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1451 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/renesas/ra6e2-fpb/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1493 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1510 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1515 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1519 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1523 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/r_sci_uart/
A Dr_sci_uart.c1425 uint32_t fcr = 0U; in r_sci_uart_fifo_cfg() local
1432 fcr |= SCI_UART_FCR_TTRG_DMAC_VALUE << SCI_UART_FCR_TTRG_OFFSET; in r_sci_uart_fifo_cfg()
1450 …fcr |= (((p_instance_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MA… in r_sci_uart_fifo_cfg()
1455 …fcr |= ((p_instance_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFS… in r_sci_uart_fifo_cfg()
1459 p_instance_ctrl->p_reg->FCR = (uint32_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
/bsp/renesas/ra6m4-iot/ra/fsp/src/r_sci_uart/
A Dr_sci_uart.c1367 uint32_t fcr = 1U; in r_sci_uart_fifo_cfg() local
1384 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_UART_FCR_TRIGGER_MASK) << in r_sci_uart_fifo_cfg()
1389 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_UART_FCR_TRIGGER_MASK) << SCI_UART_FCR_RSTRG_OFFSET; in r_sci_uart_fifo_cfg()
1393 p_ctrl->p_reg->FCR = (uint16_t) (fcr | SCI_UART_FCR_RESET_TX_RX); in r_sci_uart_fifo_cfg()
1397 FSP_HARDWARE_REGISTER_WAIT(p_ctrl->p_reg->FCR, fcr); in r_sci_uart_fifo_cfg()
/bsp/allwinner/libraries/drivers/
A Ddrv_uart.c537 uint8_t fcr; in uart_set_fifo() local
541 fcr = UART_FCR_RXTRG_1_2 | UART_FCR_TXTRG_EMP | UART_FCR_FIFO_EN; in uart_set_fifo()
543 hal_writeb(fcr, uart_base + UART_FCR); in uart_set_fifo()
/bsp/renesas/ra8m1-ek/ra/fsp/src/r_sci_b_uart/
A Dr_sci_b_uart.c1337 uint32_t fcr = 0U; in r_sci_b_uart_fifo_cfg() local
1357 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_B_UART_FCR_TRIGGER_MASK) << in r_sci_b_uart_fifo_cfg()
1362 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_B_UART_FCR_TRIGGER_MASK) << R_SCI_B0_FCR_RSTRG_Pos; in r_sci_b_uart_fifo_cfg()
1366 p_ctrl->p_reg->FCR |= fcr; in r_sci_b_uart_fifo_cfg()
/bsp/renesas/ra8d1-vision-board/ra/fsp/src/r_sci_b_uart/
A Dr_sci_b_uart.c1337 uint32_t fcr = 0U; in r_sci_b_uart_fifo_cfg() local
1357 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_B_UART_FCR_TRIGGER_MASK) << in r_sci_b_uart_fifo_cfg()
1362 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_B_UART_FCR_TRIGGER_MASK) << R_SCI_B0_FCR_RSTRG_Pos; in r_sci_b_uart_fifo_cfg()
1366 p_ctrl->p_reg->FCR |= fcr; in r_sci_b_uart_fifo_cfg()
/bsp/renesas/ra8d1-ek/ra/fsp/src/r_sci_b_uart/
A Dr_sci_b_uart.c1337 uint32_t fcr = 0U; in r_sci_b_uart_fifo_cfg() local
1357 … fcr |= (((p_ctrl->fifo_depth - 1U) & p_extend->rx_fifo_trigger) & SCI_B_UART_FCR_TRIGGER_MASK) << in r_sci_b_uart_fifo_cfg()
1362 fcr |= ((p_ctrl->fifo_depth - 1U) & SCI_B_UART_FCR_TRIGGER_MASK) << R_SCI_B0_FCR_RSTRG_Pos; in r_sci_b_uart_fifo_cfg()
1366 p_ctrl->p_reg->FCR |= fcr; in r_sci_b_uart_fifo_cfg()
/bsp/allwinner/libraries/sunxi-hal/include/hal/
A Dhal_uart.h224 unsigned char fcr; member

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