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Searched refs:gioREG (Results 1 – 2 of 2) sorted by relevance

/bsp/rm48x50/HALCoGen/source/
A Dgio.c32 gioREG->GCR0 = 1U; in gioInit()
33 gioREG->INTENACLR = 0xFFU; in gioInit()
34 gioREG->LVLCLR = 0xFFU; in gioInit()
146 gioREG->POL = 0U /* Bit 0 */ in gioInit()
166 gioREG->LVLSET = 0U /* Bit 0 */ in gioInit()
188 gioREG->FLG = 0xFFU; in gioInit()
191 gioREG->INTENASET = 0U /* Bit 0 */ in gioInit()
373 gioREG->INTENASET = 1U << bit; in gioEnableNotification()
377 gioREG->INTENASET = 1U << (bit + 8); in gioEnableNotification()
406 gioREG->INTENACLR = 1U << bit; in gioDisableNotification()
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/bsp/rm48x50/HALCoGen/include/
A Dreg_gio.h79 #define gioREG ((gioBASE_t *)0xFFF7BC00U) macro

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