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Searched refs:high (Results 1 – 25 of 93) sorted by relevance

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/bsp/stm32/stm32l475-atk-pandora/board/ports/lcd/
A Dlcd_qrcode.c43 rt_uint32_t width = 0, high = 0; in show_qrcode_by_point() local
44 for (high = 0; high < size; high++) in show_qrcode_by_point()
48 if (qrcode_getModule(&qrcode, width, high)) in show_qrcode_by_point()
55 …cd_draw_point(x + enlargement_factor * width + offset_x, y + enlargement_factor * high + offset_y); in show_qrcode_by_point()
65 rt_uint32_t width = 0, high = 0; in show_qrcode_by_line() local
66 for (high = 0; high < qrcode.size; high++) in show_qrcode_by_line()
70 if (qrcode_getModule(&qrcode, width, high)) in show_qrcode_by_line()
98 …lcd_show_image(x, y + high * enlargement_factor, qrcode.size * enlargement_factor, enlargement_fac… in show_qrcode_by_line()
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_tsns_drv.c26 void tsns_configure_high_limit_event(TSNS_Type *ptr, int32_t high, tsns_event_t e) in tsns_configure_high_limit_event() argument
30 tsns_set_irq_threshold_high(ptr, high); in tsns_configure_high_limit_event()
34 tsns_set_reset_threshold_high(ptr, high); in tsns_configure_high_limit_event()
42 void tsns_configure_limit_event(TSNS_Type *ptr, int32_t high, int32_t low, tsns_event_t e) in tsns_configure_limit_event() argument
44 assert(high > low); in tsns_configure_limit_event()
47 tsns_config_irq_threshold(ptr, high, low); in tsns_configure_limit_event()
51 tsns_config_reset_threshold(ptr, high, low); in tsns_configure_limit_event()
A Dhpm_spi_drv.c568 hpm_stat_t spi_directio_write(SPI_Type *ptr, spi_directio_pin_t pin, bool high) in spi_directio_write() argument
573 …(high == true) ? (ptr->DIRECTIO |= SPI_DIRECTIO_HOLD_O_MASK) : (ptr->DIRECTIO &= ~SPI_DIRECTIO_HOL… in spi_directio_write()
576 …(high == true) ? (ptr->DIRECTIO |= SPI_DIRECTIO_WP_O_MASK) : (ptr->DIRECTIO &= ~SPI_DIRECTIO_WP_O_… in spi_directio_write()
579 …(high == true) ? (ptr->DIRECTIO |= SPI_DIRECTIO_MISO_O_MASK) : (ptr->DIRECTIO &= ~SPI_DIRECTIO_MIS… in spi_directio_write()
582 …(high == true) ? (ptr->DIRECTIO |= SPI_DIRECTIO_MOSI_O_MASK) : (ptr->DIRECTIO &= ~SPI_DIRECTIO_MOS… in spi_directio_write()
585 …(high == true) ? (ptr->DIRECTIO |= SPI_DIRECTIO_SCLK_O_MASK) : (ptr->DIRECTIO &= ~SPI_DIRECTIO_SCL… in spi_directio_write()
588 …(high == true) ? (ptr->DIRECTIO |= SPI_DIRECTIO_CS_O_MASK) : (ptr->DIRECTIO &= ~SPI_DIRECTIO_CS_O_… in spi_directio_write()
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_tsns_drv.h149 static inline void tsns_set_reset_threshold_high(TSNS_Type *ptr, uint32_t high) in tsns_set_reset_threshold_high() argument
151 ptr->UPPER_LIM_IRQ = TSNS_UPPER_LIM_RST_T_SET(high); in tsns_set_reset_threshold_high()
191 static inline void tsns_set_irq_threshold_high(TSNS_Type *ptr, uint32_t high) in tsns_set_irq_threshold_high() argument
193 ptr->UPPER_LIM_IRQ = TSNS_UPPER_LIM_IRQ_T_SET(high); in tsns_set_irq_threshold_high()
235 static inline void tsns_config_irq_threshold(TSNS_Type *ptr, uint32_t high, uint32_t low) in tsns_config_irq_threshold() argument
238 tsns_set_irq_threshold_high(ptr, high); in tsns_config_irq_threshold()
248 static inline void tsns_config_reset_threshold(TSNS_Type *ptr, uint32_t high, uint32_t low) in tsns_config_reset_threshold() argument
251 tsns_set_reset_threshold_high(ptr, high); in tsns_config_reset_threshold()
398 void tsns_configure_high_limit_event(TSNS_Type *ptr, int32_t high, tsns_event_t e);
408 void tsns_configure_limit_event(TSNS_Type *ptr, int32_t high, int32_t low, tsns_event_t e);
A Dhpm_vad_drv.h300 static inline void vad_set_amplify(VAD_Type *ptr, uint16_t high, uint16_t low) in vad_set_amplify() argument
302 ptr->DEC_CTRL2 = VAD_DEC_CTRL2_AMP_HIGH_SET(high) in vad_set_amplify()
/bsp/rockchip/common/rk_hal/lib/hal/src/
A Dhal_base_ex.c53 uint32_t high = numerator >> 32; in HAL_DivU64Rem() local
56 if (high >= denominator) { in HAL_DivU64Rem()
57 high /= denominator; in HAL_DivU64Rem()
58 result = (uint64_t)high << 32; in HAL_DivU64Rem()
59 remainder -= (uint64_t)(high * denominator) << 32; in HAL_DivU64Rem()
A Dhal_timer.c241 uint32_t high, low, temp; in HAL_TIMER_GetCount() local
246 high = pReg->CURRENT_VALUE[1]; in HAL_TIMER_GetCount()
249 } while (high != temp); in HAL_TIMER_GetCount()
251 return ((uint64_t)high << 32) | low; in HAL_TIMER_GetCount()
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/
A Dbflb_mtimer.c72 uint32_t high = rem >> 32; in __div64_32() local
75 if (high >= base) { in __div64_32()
76 high /= base; in __div64_32()
77 res = (uint64_t) high << 32; in __div64_32()
78 rem -= (uint64_t) (high*base) << 32; in __div64_32()
A Dbflb_sec_sha.c292 uint32_t high, low; in bflb_sha1_finish() local
301 high = (ctx->total[0] >> 29) | (ctx->total[1] << 3); in bflb_sha1_finish()
304 PUT_UINT32_BE(high, msgLen, 0); in bflb_sha1_finish()
379 uint64_t high, low; in bflb_sha512_finish() local
388 high = (ctx->total[0] >> 61) | (ctx->total[1] << 3); in bflb_sha512_finish()
391 PUT_UINT64_BE(high, msgLen, 0); in bflb_sha512_finish()
746 uint32_t high, low; in bflb_sha1_link_finish() local
757 high = (ctx->total[0] >> 29) | (ctx->total[1] << 3); in bflb_sha1_link_finish()
760 PUT_UINT32_BE(high, msgLen, 0); in bflb_sha1_link_finish()
807 uint64_t high, low; in bflb_sha512_link_finish() local
[all …]
/bsp/ft2004/libraries/bsp/ft_can/
A Dft_can_calc.c47 #define clamp(x, low, high) (min(max(low, x), high)) argument
86 u32 high = rem >> 32; in div64_32() local
90 if (high >= base) in div64_32()
92 high /= base; in div64_32()
93 res = (u64)high << 32; in div64_32()
94 rem -= (u64)(high * base) << 32; in div64_32()
/bsp/ti/c28x/libraries/tms320f28379d/common/source/
A DF2837xD_Ipc.c91 Uint32 low, high; in ReadIpcTimer() local
94 high = IpcRegs.IPCCOUNTERH; in ReadIpcTimer()
95 return ((unsigned long long)high << 32) | (unsigned long long)low; in ReadIpcTimer()
/bsp/efm32/
A Ddrv_adc.c74 rt_int8_t high, mid, low, tmp; in efm32_adc_calibration() local
90 high = 63; in efm32_adc_calibration()
94 while (low < high) in efm32_adc_calibration()
97 mid = low + (high - low) / 2; in efm32_adc_calibration()
122 high = mid; in efm32_adc_calibration()
144 high = 127; in efm32_adc_calibration()
148 while (low < high) in efm32_adc_calibration()
151 mid = low + (high - low) / 2; in efm32_adc_calibration()
178 high = mid; in efm32_adc_calibration()
/bsp/allwinner/libraries/sunxi-hal/hal/source/dma/
A Dhal_dma.c700 uint32_t high = 0; in hal_dma_start() local
718 high = (chan->chan_count + START_CHAN_OFFSET >= HIGH_CHAN) ? 1 : 0; in hal_dma_start()
720 irq_val = hal_readl(DMA_IRQ_EN(high)); in hal_dma_start()
722 hal_writel(irq_val, DMA_IRQ_EN(high)); in hal_dma_start()
771 uint32_t high = 0; in hal_dma_chan_free() local
790 irq_val = hal_readl(DMA_IRQ_EN(high)); in hal_dma_chan_free()
792 hal_writel(irq_val, DMA_IRQ_EN(high)); in hal_dma_chan_free()
817 uint32_t i = 0, high = 0; in hal_dma_init() local
823 high = (i >= HIGH_CHAN) ? 1 : 0; in hal_dma_init()
825 hal_writel(0, DMA_IRQ_EN(high)); in hal_dma_init()
[all …]
/bsp/nxp/lpc/lpc43xx/M0/applications/
A Dvbus_drv.c53 .recv_wm.high = RT_VMM_RB_BLK_NR * 2 / 3,
55 .post_wm.high = RT_VMM_RB_BLK_NR * 2 / 3,
/bsp/nxp/lpc/lpc43xx/M4/applications/
A Dvbus_drv.c53 .recv_wm.high = RT_VMM_RB_BLK_NR * 2 / 3,
55 .post_wm.high = RT_VMM_RB_BLK_NR * 2 / 3,
/bsp/CME_M7/StdPeriph_Driver/src/
A Dcmem7_dma.c69 INNER_CTL_HIGH high; member
221 inner->high.INNER.CTL_HI = 0; in DMA_Transfer()
222 inner->high.INNER.CTL_HI_b.BLOCK_TS = (p->number >> DMA_TR_WIDTH_32_BIT); in DMA_Transfer()
223 inner->high.INNER.CTL_HI_b.DONE = 0; in DMA_Transfer()
248 DMA->CTL_HI0 = llp ? 0x0 : inner->high.INNER.CTL_HI; in DMA_Transfer()
/bsp/hpmicro/libraries/hpm_sdk/components/touch/gt911/
A Dhpm_touch_gt911.c46 void pull_int_pin(bool high) in pull_int_pin() argument
49 gpio_write_pin(BOARD_CAP_INTR_GPIO, BOARD_CAP_INTR_GPIO_INDEX, BOARD_CAP_INTR_GPIO_PIN, high); in pull_int_pin()
/bsp/stm32/stm32f407-rt-spark/board/ports/lcd/
A Ddrv_lcd.c959 rt_uint32_t width = 0, high = 0; in show_qrcode_by_point() local
960 for (high = 0; high < size; high++) in show_qrcode_by_point()
964 if (qrcode_getModule(&qrcode, width, high)) in show_qrcode_by_point()
971 …cd_draw_point(x + enlargement_factor * width + offset_x, y + enlargement_factor * high + offset_y); in show_qrcode_by_point()
981 rt_uint32_t width = 0, high = 0; in show_qrcode_by_line() local
982 for (high = 0; high < qrcode.size; high++) in show_qrcode_by_line()
986 if (qrcode_getModule(&qrcode, width, high)) in show_qrcode_by_line()
1014 …lcd_show_image(x, y + high * enlargement_factor, qrcode.size * enlargement_factor, enlargement_fac… in show_qrcode_by_line()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/usb/class/cdc/
A Dusb_protocol_cdc.h319 uint8_t high; member
326 uint8_t high; member
333 uint8_t high; member
/bsp/microchip/samd51-seeed-wio-terminal/bsp/usb/class/cdc/
A Dusb_protocol_cdc.h319 uint8_t high; member
326 uint8_t high; member
333 uint8_t high; member
/bsp/hpmicro/libraries/hpm_sdk/components/touch/gt9xx/
A Dhpm_touch_gt9xx.c60 void pull_int_pin(bool high) in pull_int_pin() argument
63 gpio_write_pin(BOARD_CAP_INTR_GPIO, BOARD_CAP_INTR_GPIO_INDEX, BOARD_CAP_INTR_GPIO_PIN, high); in pull_int_pin()
/bsp/allwinner/libraries/sunxi-hal/hal/source/ccmu/sunxi/
A Dclk_factors.c535 unsigned long freq, int low, int high) in sunxi_clk_freq_search() argument
540 if (low > high) in sunxi_clk_freq_search()
542 return (high == -1) ? 0 : high; in sunxi_clk_freq_search()
545 mid = (low + high) / 2; in sunxi_clk_freq_search()
558 return sunxi_clk_freq_search(tbl, freq, mid + 1, high); in sunxi_clk_freq_search()
/bsp/stm32/stm32f446-st-nucleo/
A DREADME.md7 The STM32F446xC/E devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core operat…
9 The STM32F446xC/E devices incorporate high-speed embedded memories (Flash memory up to 512 Kbytes, …
54 …- USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed …
68 …ducts/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/st…
/bsp/stm32/stm32h743-st-nucleo/
A DREADME.md7 STM32H742xI/G and STM32H743xI/G devices are based on the high-performance Arm® Cortex®-M7 32-bit RI…
9 STM32H742xI/G and STM32H743xI/G devices incorporate high-speed embedded memories with a dual-bank F…
27 - D1: high-performance capabilities
49 - 1× high-speed master direct memory access controller (MDMA) with linked list support
78 - 1× high-resolution timer (2.1 ns max resolution)
/bsp/stm32/stm32l552-st-nucleo/
A DREADME.md7 …high-performance Arm® Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 110 MHz. …
29 - D1: high-performance capabilities
50 - 1× high-speed master direct memory access controller (MDMA) with linked list support
79 - 1× high-resolution timer (2.1 ns max resolution)

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