| /bsp/qemu-vexpress-a9/drivers/ |
| A D | drv_timer.c | 27 #define TIMER_LOAD(hw_base) __REG32(hw_base + 0x00) argument
28 #define TIMER_VALUE(hw_base) __REG32(hw_base + 0x04) argument
29 #define TIMER_CTRL(hw_base) __REG32(hw_base + 0x08) argument
39 #define TIMER_INTCLR(hw_base) __REG32(hw_base + 0x0c) argument
40 #define TIMER_RIS(hw_base) __REG32(hw_base + 0x10) argument
41 #define TIMER_MIS(hw_base) __REG32(hw_base + 0x14) argument
42 #define TIMER_BGLOAD(hw_base) __REG32(hw_base + 0x18) argument
44 #define TIMER_LOAD(hw_base) __REG32(hw_base + 0x00) argument
45 #define TIMER_VALUE(hw_base) __REG32(hw_base + 0x04) argument
46 #define TIMER_CTRL(hw_base) __REG32(hw_base + 0x08) argument
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| A D | drv_uart_v2.c | 28 rt_uint32_t hw_base; member
137 if((UART_FR(uart->hw_base) & UARTFR_RXFF) && (UART_IMSC(uart->hw_base) & UARTIMSC_RXIM)) in rt_hw_uart_isr()
149 rec_ch = UART_DR(uart->hw_base) & 0xff; in rt_hw_uart_isr()
176 UART_ICR(uart->hw_base) |= UARTICR_TXIC; in rt_hw_uart_isr()
252 while (UART_FR(uart->hw_base) & UARTFR_TXFF); in uart_putc()
253 UART_DR(uart->hw_base) = ch; in uart_putc()
268 if (!(UART_FR(uart->hw_base) & UARTFR_RXFE)) in uart_getc()
270 ch = UART_DR(uart->hw_base) & 0xff; in uart_getc()
297 UART_DR(uart->hw_base) = ch; in uart_transmit()
356 _uart_device[i].hw_base = (uint32_t)rt_ioremap((void*)_uart_device[i].hw_base, 0x1000); in rt_hw_uart_init()
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| A D | drv_uart.c | 25 rt_uint32_t hw_base; member
128 UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM; in uart_control()
133 UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM; in uart_control()
148 while (UART_FR(uart->hw_base) & UARTFR_TXFF); in uart_putc()
149 UART_DR(uart->hw_base) = ch; in uart_putc()
163 if (!(UART_FR(uart->hw_base) & UARTFR_RXFE)) in uart_getc()
165 ch = UART_DR(uart->hw_base) & 0xff; in uart_getc()
189 _uart_device[i].hw_base = (uint32_t)rt_ioremap((void*)_uart_device[i].hw_base, 0x1000); in rt_hw_uart_init()
202 UART_CR(_uart_device[i].hw_base) = (1 << 0) | (1 << 8) | (1 << 9); in rt_hw_uart_init()
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| /bsp/zynqmp-r5-axu4ev/drivers/ |
| A D | drv_timer.h | 10 #define TTC_CLK_CNTRL(hw_base) __REG32(hw_base + 0x00) argument
18 #define TTC_CNT_CNTRL(hw_base) __REG32(hw_base + 0x0C) argument
28 #define TTC_COUNT_VALUE(hw_base) __REG32(hw_base + 0x18) argument
29 #define TTC_INTERVAL_VAL(hw_base) __REG32(hw_base + 0x24) argument
30 #define TTC_MATCH_0(hw_base) __REG32(hw_base + 0x30) argument
31 #define TTC_MATCH_1(hw_base) __REG32(hw_base + 0x3C) argument
32 #define TTC_MATCH_2(hw_base) __REG32(hw_base + 0x48) argument
34 #define TTC_ISR(hw_base) __REG32(hw_base + 0x54) argument
42 #define TTC_IER(hw_base) __REG32(hw_base + 0x60) argument
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| /bsp/raspberry-pi/raspi4-32/driver/ |
| A D | drv_uart.c | 42 rt_ubase_t hw_base; member
55 if(uart->hw_base == AUX_BASE) in uart_configure()
71 if(uart->hw_base == UART0_BASE) in uart_configure()
84 if(uart->hw_base == UART3_BASE) in uart_configure()
90 if(uart->hw_base == UART4_BASE) in uart_configure()
96 if(uart->hw_base == UART5_BASE) in uart_configure()
116 PL011_REG_IMSC(uart->hw_base) = 0; in uart_configure()
131 if(uart->hw_base == AUX_BASE) in uart_control()
144 if(uart->hw_base == AUX_BASE) in uart_control()
164 if(uart->hw_base == AUX_BASE) in uart_putc()
[all …]
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| A D | drv_spi.c | 84 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_CPOL; in raspi_spi_configure()
88 SPI_REG_CS(hwcfg->hw_base) &= ~SPI_CS_CPOL; in raspi_spi_configure()
93 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_CPHA; in raspi_spi_configure()
96 SPI_REG_CS(hwcfg->hw_base) &= ~SPI_CS_CPHA; in raspi_spi_configure()
101 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_CSPOL_HIGH; in raspi_spi_configure()
139 while (!(SPI_REG_CS(hwcfg->hw_base) & SPI_CS_DONE)); in spi_transfernb()
169 SPI_REG_CLK(hwcfg->hw_base) = 0; in raspi_spi_xfer()
179 SPI_REG_CS(hwcfg->hw_base) &= (~(3 << 0)); in raspi_spi_xfer()
190 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_TA; in raspi_spi_xfer()
196 SPI_REG_CS(hwcfg->hw_base) &= (~SPI_CS_TA); in raspi_spi_xfer()
[all …]
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| /bsp/raspberry-pi/raspi4-64/drivers/ |
| A D | drv_uart.c | 48 rt_ubase_t hw_base; member
61 if(uart->hw_base == AUX_BASE) in uart_configure()
77 if(uart->hw_base == uart0_addr) in uart_configure()
83 if(uart->hw_base == uart3_addr) in uart_configure()
89 if(uart->hw_base == uart4_addr) in uart_configure()
143 if(uart->hw_base == AUX_BASE) in uart_putc()
164 if(uart->hw_base == AUX_BASE) in uart_getc()
339 uart0->hw_base = uart0_addr; in rt_hw_uart_init()
374 uart3->hw_base = uart3_addr; in rt_hw_uart_init()
391 uart4->hw_base = uart4_addr; in rt_hw_uart_init()
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| A D | drv_spi.c | 83 SPI_REG_CS(hwcfg->hw_base) = (SPI_CS_CLEAR_TX | SPI_CS_CLEAR_RX); in raspi_spi_configure()
86 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_CPOL; in raspi_spi_configure()
91 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_CPHA; in raspi_spi_configure()
96 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_CSPOL_HIGH; in raspi_spi_configure()
106 SPI_REG_CLK(hwcfg->hw_base) = divider; in raspi_spi_configure()
128 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_TA; in spi_transfernb()
147 while (!(SPI_REG_CS(hwcfg->hw_base) & SPI_CS_DONE)); in spi_transfernb()
149 SPI_REG_CS(hwcfg->hw_base) |= (0 & SPI_CS_TA); in spi_transfernb()
217 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_CHIP_SELECT_0; in raspi_spi_hw_init()
221 SPI_REG_CS(hwcfg->hw_base) |= SPI_CS_CHIP_SELECT_1; in raspi_spi_hw_init()
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| /bsp/ultrarisc/drivers/ |
| A D | drv_uart.c | 26 rt_ubase_t hw_base; member
50 write8_uart(uart->hw_base, UART_IER, 0x00); in _uart_configure()
54 write8_uart(uart->hw_base, 0, div & 0xff); in _uart_configure()
56 write8_uart(uart->hw_base, 1, (div >> 8) & 0xff); in _uart_configure()
62 write8_uart(uart->hw_base, UART_IER, ier); in _uart_configure()
100 write8_uart(uart->hw_base, UART_THR, c); in _uart_putc()
112 lsr = read8_uart(uart->hw_base, UART_LSR); in _uart_getc()
116 ch = read8_uart(uart->hw_base, UART_RHR); in _uart_getc()
164 uart->hw_base = (rt_ubase_t)uart0_base; in rt_hw_uart_init()
170 write8_uart(uart->hw_base, UART_IER, 0); in rt_hw_uart_init()
[all …]
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| /bsp/raspberry-pi/raspi2/driver/ |
| A D | drv_uart.c | 24 rt_uint32_t hw_base; member
35 if (uart->hw_base == AUX_BASE) in uart_configure()
52 AUX_ENABLES(uart->hw_base) = 1; /* Enable UART1 */ in uart_configure()
53 AUX_MU_IER_REG(uart->hw_base) = 0; /* Disable interrupt */ in uart_configure()
56 AUX_MU_MCR_REG(uart->hw_base) = 0; /* Disable RTS */ in uart_configure()
76 AUX_MU_IER_REG(uart->hw_base) = 0x0; in uart_control()
82 AUX_MU_IER_REG(uart->hw_base) = 0x1; in uart_control()
97 while (!(AUX_MU_LSR_REG(uart->hw_base) & 0x20)); in uart_putc()
98 AUX_MU_IO_REG(uart->hw_base) = c; in uart_putc()
111 if ((AUX_MU_LSR_REG(uart->hw_base) & 0x01)) in uart_getc()
[all …]
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| /bsp/raspberry-pi/raspi3-32/driver/ |
| A D | drv_uart.c | 24 rt_uint32_t hw_base; member
35 if (uart->hw_base == AUX_BASE) in uart_configure()
51 AUX_ENABLES(uart->hw_base) = 1; /* Enable UART1 */ in uart_configure()
52 AUX_MU_IER_REG(uart->hw_base) = 0; /* Disable interrupt */ in uart_configure()
55 AUX_MU_MCR_REG(uart->hw_base) = 0; /* Disable RTS */ in uart_configure()
75 AUX_MU_IER_REG(uart->hw_base) = 0x0; in uart_control()
81 AUX_MU_IER_REG(uart->hw_base) = 0x1; in uart_control()
96 while (!(AUX_MU_LSR_REG(uart->hw_base) & 0x20)); in uart_putc()
97 AUX_MU_IO_REG(uart->hw_base) = c; in uart_putc()
110 if ((AUX_MU_LSR_REG(uart->hw_base) & 0x01)) in uart_getc()
[all …]
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| /bsp/raspberry-pi/raspi3-64/driver/ |
| A D | drv_uart.c | 23 rt_ubase_t hw_base; member
34 if (uart->hw_base == AUX_BASE) in uart_configure()
50 AUX_ENABLES(uart->hw_base) = 1; /* Enable UART1 */ in uart_configure()
51 AUX_MU_IER_REG(uart->hw_base) = 0; /* Disable interrupt */ in uart_configure()
54 AUX_MU_MCR_REG(uart->hw_base) = 0; /* Disable RTS */ in uart_configure()
74 AUX_MU_IER_REG(uart->hw_base) = 0x0; in uart_control()
80 AUX_MU_IER_REG(uart->hw_base) = 0x1; in uart_control()
95 while (!(AUX_MU_LSR_REG(uart->hw_base) & 0x20)); in uart_putc()
96 AUX_MU_IO_REG(uart->hw_base) = c; in uart_putc()
109 if ((AUX_MU_LSR_REG(uart->hw_base) & 0x01)) in uart_getc()
[all …]
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| /bsp/nxp/lpc/lpc2148/drivers/ |
| A D | serial.c | 43 rt_uint32_t hw_base; member
71 if (UART_LSR(lpc_serial->hw_base) & 0x01) in rt_hw_uart_isr()
82 UART_RBR(lpc_serial->hw_base); in rt_hw_uart_isr()
107 iir = UART_IIR(lpc_serial->hw_base); in rt_hw_uart_isr()
148 UART_IER(lpc_serial->hw_base) = 0x01; in rt_serial_open()
317 lpc_serial->hw_base = 0xE000C000; in rt_hw_serial_init()
328 UART_LCR(lpc_serial->hw_base) = 0x83; in rt_hw_serial_init()
335 UART_LCR(lpc_serial->hw_base) = 0x03; in rt_hw_serial_init()
355 lpc_serial->hw_base = 0xE0010000; in rt_hw_serial_init()
366 UART_LCR(lpc_serial->hw_base) = 0x83; in rt_hw_serial_init()
[all …]
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| /bsp/nxp/lpc/lpc2478/drivers/ |
| A D | serial.c | 43 rt_uint32_t hw_base; member
72 if (UART_LSR(lpc_serial->hw_base) & 0x01) in rt_hw_uart_isr()
83 UART_RBR(lpc_serial->hw_base); in rt_hw_uart_isr()
108 iir = UART_IIR(lpc_serial->hw_base); in rt_hw_uart_isr()
134 UART_IER(lpc_serial->hw_base) = 0x01; in rt_serial_open()
290 lpc_serial->hw_base = 0xE000C000; in rt_hw_serial_init()
301 UART_LCR(lpc_serial->hw_base) = 0x83; in rt_hw_serial_init()
308 UART_LCR(lpc_serial->hw_base) = 0x03; in rt_hw_serial_init()
328 lpc_serial->hw_base = 0xE0010000; in rt_hw_serial_init()
339 UART_LCR(lpc_serial->hw_base) = 0x83; in rt_hw_serial_init()
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| /bsp/tm4c129x/drivers/ |
| A D | drv_uart.c | 27 uint32_t hw_base; // base address member
39 MAP_UARTDisable(uart->hw_base); in hw_configure()
45 MAP_UART9BitEnable(uart->hw_base); in hw_configure()
92 MAP_UARTFIFOEnable(uart->hw_base); in hw_configure()
95 MAP_UARTEnable(uart->hw_base); in hw_configure()
126 MAP_UARTCharPut(uart->hw_base, *((uint8_t *)&c)); in hw_putc()
136 return MAP_UARTCharGetNonBlocking(uart->hw_base); in hw_getc()
164 intsrc = MAP_UARTIntStatus(uart->hw_base, true); in UART0_IRQHandler()
169 MAP_UARTIntClear(uart->hw_base, intsrc); in UART0_IRQHandler()
207 UARTIntRegister(uart->hw_base, UART0_IRQHandler); in rt_hw_uart_init()
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| /bsp/zynqmp-a53-dfzu2eg/drivers/ |
| A D | drv_uart.c | 21 .hw_base = base, \
29 rt_ubase_t hw_base; member
173 mode_reg = readl(uart->hw_base + XUARTPS_MR_OFFSET); in zynqmp_uart_configure()
226 writel(mode_reg, uart->hw_base + XUARTPS_MR_OFFSET); in zynqmp_uart_configure()
229 writel(0x08U, uart->hw_base + XUARTPS_RXWM_OFFSET); in zynqmp_uart_configure()
251 _uart_set_interrupt_mask(uart->hw_base, 0U); in zynqmp_uart_control()
255 _uart_set_fifo_threshold(uart->hw_base, 1); in zynqmp_uart_control()
271 while ((readl(uart->hw_base + XUARTPS_SR_OFFSET) & in zynqmp_uart_putc()
290 if ((readl(uart->hw_base + XUARTPS_SR_OFFSET) & in zynqmp_uart_getc()
296 int ch = readl(uart->hw_base + XUARTPS_FIFO_OFFSET); in zynqmp_uart_getc()
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| /bsp/mini2440/drivers/ |
| A D | uart.c | 35 rt_uint32_t hw_base; member
46 writel(uart->hw_base + UCON_OFS, 0x05); in s3c2440_serial_configure()
47 writel(uart->hw_base + UFCON_OFS, 0x00); in s3c2440_serial_configure()
48 writel(uart->hw_base + UMCON_OFS, 0x00); in s3c2440_serial_configure()
94 while (!(readl(uart->hw_base + UTRSTAT_OFS) & (1 << 2))) in s3c2440_putc()
98 writel(uart->hw_base + UTXH_OFS, c); in s3c2440_putc()
109 if (readl(uart->hw_base + UTRSTAT_OFS) & (1 << 0)) in s3c2440_getc()
111 ch = readl(uart->hw_base + URXH_OFS) & 0x000000FF; in s3c2440_getc()
156 .hw_base = 0x50000000,
169 .hw_base = 0x50004000,
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| /bsp/cvitek/drivers/ |
| A D | drv_uart.c | 43 rt_ubase_t hw_base; member
123 base = uart->hw_base; in dw8250_uart_configure()
175 base = uart->hw_base; in dw8250_uart_putc()
192 base = uart->hw_base; in dw8250_uart_getc()
216 iir = dw8250_read32(uart->hw_base, UART_IIR); in rt_hw_uart_isr()
237 dw8250_read32(uart->hw_base, UART_USR); in rt_hw_uart_isr()
453 uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000); in rt_hw_uart_init()
461 uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000); in rt_hw_uart_init()
469 uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000); in rt_hw_uart_init()
477 uart->hw_base = (rt_ubase_t)DRV_IOREMAP((void*)uart->hw_base, 0x10000); in rt_hw_uart_init()
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| /bsp/sam7x/drivers/ |
| A D | serial.c | 64 struct rt_at91serial_hw* hw_base; member
163 serial->hw_base->US_BRGR = bd; in rt_serial_init()
185 serial->hw_base->US_IER = 1 << 0; /* RxReady interrupt */ in rt_serial_open()
276 while (!(serial->hw_base->US_CSR & AT91C_US_RXRDY)); in rt_serial_read()
279 *ptr = serial->hw_base->US_RHR; in rt_serial_read()
307 while (!(serial->hw_base->US_CSR & AT91C_US_TXRDY)); in rt_serial_write()
308 serial->hw_base->US_THR = '\r'; in rt_serial_write()
312 while (!(serial->hw_base->US_CSR & AT91C_US_TXRDY)); in rt_serial_write()
315 serial->hw_base->US_THR = *ptr; in rt_serial_write()
325 while (!(serial->hw_base->US_CSR & AT91C_US_TXRDY)); in rt_serial_write()
[all …]
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| /bsp/qemu-virt64-aarch64/drivers/ |
| A D | drv_uart.c | 20 rt_size_t hw_base; member
60 UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM; in uart_control()
65 UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM; in uart_control()
83 while (UART_FR(uart->hw_base) & UARTFR_TXFF); in uart_putc()
84 UART_DR(uart->hw_base) = c; in uart_putc()
98 if (!(UART_FR(uart->hw_base) & UARTFR_RXFE)) in uart_getc()
100 ch = UART_DR(uart->hw_base) & 0xff; in uart_getc()
130 _uart0_device.hw_base = (rt_size_t)rt_ioremap((void*)_uart0_device.hw_base, PL011_UART0_SIZE); in rt_hw_uart_init()
142 UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9); in rt_hw_uart_init()
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| /bsp/lm3s9b9x/drivers/ |
| A D | serial.c | 39 rt_uint32_t hw_base; member
62 status = UARTIntStatus(serial->hw_base, true); in rt_hw_uart_isr()
65 UARTIntClear(serial->hw_base, status); in rt_hw_uart_isr()
72 while (UARTCharsAvail(serial->hw_base)) in rt_hw_uart_isr()
74 ch = UARTCharGetNonBlocking(serial->hw_base); in rt_hw_uart_isr()
159 if (serial->hw_base == UART0_BASE) in rt_serial_open()
161 else if (serial->hw_base == UART1_BASE) in rt_serial_open()
180 UARTIntDisable(serial->hw_base, UART_INT_RX | UART_INT_RT); in rt_serial_close()
243 *ptr = UARTCharGetNonBlocking(serial->hw_base); in rt_serial_read()
308 serial->hw_base = UART0_BASE; in rt_hw_serial_init()
[all …]
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| /bsp/lm3s8962/drivers/ |
| A D | serial.c | 39 rt_uint32_t hw_base; member
62 status = UARTIntStatus(serial->hw_base, true); in rt_hw_uart_isr()
65 UARTIntClear(serial->hw_base, status); in rt_hw_uart_isr()
72 while (UARTCharsAvail(serial->hw_base)) in rt_hw_uart_isr()
74 ch = UARTCharGetNonBlocking(serial->hw_base); in rt_hw_uart_isr()
159 if (serial->hw_base == UART0_BASE) in rt_serial_open()
161 else if (serial->hw_base == UART1_BASE) in rt_serial_open()
180 UARTIntDisable(serial->hw_base, UART_INT_RX | UART_INT_RT); in rt_serial_close()
243 *ptr = UARTCharGetNonBlocking(serial->hw_base); in rt_serial_read()
308 serial->hw_base = UART0_BASE; in rt_hw_serial_init()
[all …]
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| /bsp/lm4f232/drivers/ |
| A D | serial.c | 39 rt_uint32_t hw_base; member
62 status = UARTIntStatus(serial->hw_base, true); in rt_hw_uart_isr()
65 UARTIntClear(serial->hw_base, status); in rt_hw_uart_isr()
72 while (UARTCharsAvail(serial->hw_base)) in rt_hw_uart_isr()
74 ch = UARTCharGetNonBlocking(serial->hw_base); in rt_hw_uart_isr()
159 if (serial->hw_base == UART0_BASE) in rt_serial_open()
161 else if (serial->hw_base == UART1_BASE) in rt_serial_open()
180 UARTIntDisable(serial->hw_base, UART_INT_RX | UART_INT_RT); in rt_serial_close()
243 *ptr = UARTCharGetNonBlocking(serial->hw_base); in rt_serial_read()
308 serial->hw_base = UART0_BASE; in rt_hw_serial_init()
[all …]
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| /bsp/allwinner_tina/drivers/ |
| A D | drv_uart.c | 28 rt_uint32_t hw_base; member
77 uart->hw_base = UART0_BASE_ADDR; // UART0_BASE; in rt_hw_uart_init()
170 if ((rt_uint32_t)(uart->hw_base) == UART0_BASE_ADDR) in uart_configure()
191 addr = uart->hw_base; in uart_configure()
234 writel(0x00, uart->hw_base + UART_IER); in uart_control()
242 writel(0x01, uart->hw_base + UART_IER); in uart_control()
258 sed_buf = (rt_uint32_t *)(uart->hw_base + UART_THR); in uart_putc()
259 sta = (rt_uint32_t *)(uart->hw_base + UART_USR); in uart_putc()
276 rec_buf = (rt_uint32_t *)(uart->hw_base + UART_RHB); in uart_getc()
277 sta = (rt_uint32_t *)(uart->hw_base + UART_USR); in uart_getc()
[all …]
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| /bsp/k230/drivers/interdrv/hardlock/ |
| A D | drv_hardlock.c | 47 volatile void *hw_base; member
57 if(!readl(hardlock.hw_base + num * 0x4)) in kd_hardlock_lock()
73 if(readl(hardlock.hw_base + num * 0x4)) in kd_hardlock_unlock()
75 writel(0x0, hardlock.hw_base + num * 0x4); in kd_hardlock_unlock()
100 hard->hw_base = 0xA0 + rt_ioremap((void *)MAILBOX_BASE_ADDR, MAILBOX_IO_SIZE); in rt_hw_hardlock_init()
101 if(hard->hw_base == RT_NULL) in rt_hw_hardlock_init()
|