1 /*
2  * Copyright 2020 GreenWaves Technologies
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *     http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  *
16  * SPDX-License-Identifier: Apache-2.0
17  */
18 
19 #ifndef HAL_INCLUDE_HAL_I2C_INTERNAL_H_
20 #define HAL_INCLUDE_HAL_I2C_INTERNAL_H_
21 
22 #include "core-v-mcu-pmsis.h"
23 #include "hal_i2c_pi.h"
24 #include "hal_soc_eu_periph.h"
25 
26 /*******************************************************************************
27  * Definitions
28  ******************************************************************************/
29 
30 /* Max length of a i2c request/data buffer. */
31 #define MAX_SIZE               (0xFF)
32 /* Length of i2c cmd buffer. */
33 #define __PI_I2C_CMD_BUFF_SIZE (16)
34 /* Lenght of i2c stop command sequence. */
35 #define __PI_I2C_STOP_CMD_SIZE (3)
36 
37 struct i2c_transfer_s
38 {
39     uint8_t *buffer;
40     uint32_t size;
41     pi_i2c_xfer_flags_e flags;
42     int8_t device_id;
43     udma_channel_e channel;
44 };
45 
46 struct i2c_pending_transfer_s
47 {
48     uint32_t pending_buffer;
49     uint32_t pending_size;
50     uint32_t pending_repeat;
51     uint32_t pending_repeat_size;
52     pi_i2c_xfer_flags_e flags;
53     int8_t device_id;
54     udma_channel_e channel;
55 };
56 
57 struct i2c_cb_args_s
58 {
59     struct pi_task *cb;
60     struct i2c_transfer_s transfer;
61     struct i2c_cb_args_s *next;
62 };
63 
64 struct i2c_driver_fifo_s
65 {
66     /* Best to use only one queue since both RX & TX can be used at the same time. */
67     struct pi_task *hw_buffer[2];                 /* RX + TX */
68     struct i2c_cb_args_s *fifo_head;              /* Head of SW fifo waiting transfers. */
69     struct i2c_cb_args_s *fifo_tail;              /* Tail of SW fifo waiting transfers. */
70     struct i2c_pending_transfer_s *pending;       /* RX + TX. */
71     uint32_t cs;                                  /* Chip select i2c device. */
72     uint32_t max_baudrate;                        /* Max baudrate for the selected i2c chip. */
73     uint32_t div;                                 /* Clock divider for the selected i2c chip. */
74     uint32_t i2c_cmd_index;                       /* Number of commands in i2c_cmd_seq. */
75     uint8_t i2c_cmd_seq[__PI_I2C_CMD_BUFF_SIZE];  /* Command sequence. */
76     uint8_t i2c_stop_send;                        /* Set if a stop command sequence should be sent. */
77     uint8_t i2c_stop_seq[__PI_I2C_STOP_CMD_SIZE]; /* Command STOP sequence. */
78 };
79 
80 /*******************************************************************************
81  * Driver data
82  *****************************************************************************/
83 
84 /*******************************************************************************
85  * Function declaration
86  ******************************************************************************/
87 
88 /* Copy in UDMA. */
89 void __pi_i2c_copy(struct i2c_driver_fifo_s *fifo, struct i2c_transfer_s *transfer, struct pi_task *task);
90 
91 /* Handler. */
92 void i2c_handler(void *arg);
93 
94 /* Clock divider. */
95 uint32_t __pi_i2c_get_clk_div(uint32_t baudrate);
96 
97 #endif /* HAL_INCLUDE_HAL_I2C_INTERNAL_H_ */
98