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/bsp/renesas/ra2l1-cpk/docs/
A DCaptouch板载触摸按键配置说明.md9 ![image-20220802110717583](picture/captouch1.png)
13 ![image-20220802111936905](picture/captouch2.png)
23 ![image-20220802113049978](picture/captouch3.png)
29 ![image-20220802114613066](picture/captouch4.png)
33 ![image-20220802115356241](picture/captouch5.png)
37 ![image-20220803110210310](picture/captouch6.png)
43 ![image-20220803114356569](picture/captouch7.png)
47 ![image-20220803114511416](picture/captouch8.png)
51 ![image-20220803114731495](picture/captouch9.png)
55 ![image-20220803114819813](picture/captouch10.png)
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/bsp/nrf5x/
A DREADME.md78 ![image-20201017191936859](docs/images/image-20201017191936859.png)
91 ![image-20201017192453525](docs/images/image-20201017192453525.png)
95 ![image-20201017192639096](docs/images/image-20201017192639096.png)
99 ![image-20201017192807997](docs/images/image-20201017192807997.png)
133 ![image-20220609112426518](docs/images/image-20220609112426518.png)
139 ![image-20220609112322574](docs/images/image-20220609112322574.png)
143 ![image-20220609112938212](docs/images/image-20220609112938212.png)
180 ![image-20220609114121378](docs/images/image-20220609114121378.png)
184 ![image-20220609114333827](docs/images/image-20220609114333827.png)
186 ![image-20220609114533743](docs/images/image-20220609114533743.png)
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/bsp/ESP32_C3/
A DSConstruct10 print("Creating esp32c3 image...")
13 image.min_rev = 3
14 image.entrypoint = e.entrypoint
18 image.segments = e.sections
19 image.flash_size_freq = image.ROM_LOADER.parse_flash_size_arg("4MB")
20 image.flash_size_freq += image.ROM_LOADER.parse_flash_freq_arg("80m")
22 image.elf_sha256 = e.sha256()
23 image.elf_sha256_offset = 0xb0
25 before = len(image.segments)
31 image.verify()
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/bsp/bouffalo_lab/bl61x/board/config/
A Dpartition_cfg_4M.toml16 # compressed image must set len,normal image can left it to 0
31 # compressed image must set len,normal image can left it to 0
46 # compressed image must set len,normal image can left it to 0
61 # compressed image must set len,normal image can left it to 0
76 # compressed image must set len,normal image can left it to 0
91 # compressed image must set len,normal image can left it to 0
106 # compressed image must set len,normal image can left it to 0
121 # compressed image must set len,normal image can left it to 0
/bsp/qemu-vexpress-a9/
A DREADME.md25 ![image-20220626114422344](figures/image-20220626114422344.png)
31 ![image-20220626114611158](figures/image-20220626114611158.png)
37 ![image-20220626113747893](figures/image-20220626113747893.png)
41 ![image-20220626114020634](figures/image-20220626114020634.png)
66 ![image-20220626125511399](figures/image-20220626125511399.png)
70 ![image-20220626125644099](figures/image-20220626125644099.png)
74 ![image-20220626125717698](figures/image-20220626125717698.png)
78 ![image-20220626125837849](figures/image-20220626125837849.png)
92 ![image-20220626115233881](figures/image-20220626115233881.png)
94 ![image-20220626115854706](figures/image-20220626115854706.png)
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/bsp/renesas/docs/
A DRA_Series_Uses_FSP_to_Configure_Peripheral_Drivers.md18 ![image.png](figures_en/openrasc.png)
49 ![image.png](figures_en/fsp_uart.png)
52 ![image.png](figures_en/fsp_uart1.png)
60 ![image-20211103200949759](figures_en/p105.png)
64 ![image-20211103200813467](figures_en/irq0.png)
70 ![image-20211103201047103](figures_en/irq1.png)
104 ![image-20211019152302939](figures_en/wdt.png)
112 ![image-20211027183406251](figures_en/wdt_env.png)
118 ![image-20211019152536749](figures_en/rtc.png)
126 ![image-20211027181550233](figures_en/rtc_env.png)
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A DPeripheral_Driver_Addition_Guide_of_RA_Series.md24 ![image-20220221161853343](figures_en/add_uart.png)
26 ![image-20220221163152761](figures_en/add_uart1.png)
30 ![image-20220221164229974](figures_en/add_uart2.png)
38 ![image-20220221170945734](figures_en/add_uart3.png)
44 ![image-20220221171806580](figures_en/add_uart4.png)
46 ![image-20220221172034531](figures_en/add_uart5.png)
53 ![image-20220221180942314](figures_en/add_uart6.png)
55 ![image-20220221183752087](figures_en/add_uart8.png)
59 ![image-20220221183405828](figures_en/add_uart7.png)
63 ![image-20220221185534932](figures_en/add_uart9.png)
A DBSP_Peripheral_Driver_Tutorial_of_RA_Series.md25 ![image-20220218162910778](figures_en/menuconfig_ra6m4cpk.png)
40 ![image-20220218163357420](figures_en/menuconfig_spi.png)
42 ![image-20220218163714429](figures_en/menuconfig_spi1.png)
56 ![image-20220218164532436](figures_en/scons_mdk5.png)
60 ![image-20220218171841353](figures_en/fsp_spi.png)
62 ![image-20220218172446068](figures_en/fsp_spi1.png)
68 ![image-20220218174145848](figures_en/fsp_spi2.png)
73 ![image-20220218174811328](figures_en/mdk_build.png)
77 ![image-20220218175442360](figures_en/mdk_build1.png)
82 ![image-20220218175926965](figures_en/run_spi1.png)
A DBuilding_a_BSP_for_the_RA_Series_Dev_Board.md71 ![image-20220217155725977](figures_en/bsp_crate.png)
73 ![image-20220217160140135](figures_en/bsp_crate1.png)
75 ![image-20220217161302858](figures_en/bsp_crate2.png)
95 ![image-20220211182959790](figures_en/fsp_crate6.png)
150 ![image](figures_en/fsp_uart.png)
152 ![image](figures_en/fsp_uart1.png)
170 ![image-20220422164816261](figures\Kconfig1.png)
179 ![image-20220422163750161](figures\drv_config.png)
208 ![image-20220217174433724](figures_en/bsp_gpio.png)
283 ![image-20220218114041568](figures_en/e2studio1.png)
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/bsp/essemi/es32f369x/applications/arduino_pinout/
A DREADME.md32 ![image-20220630160208893](picture/image-20220630160208893.png)
36 ![image-20220630160331334](picture/image-20220630160331334.png)
40 ![image-20220706134522478](picture/image-20220706134522478.png)
50 ![image-20220701145240404](picture/image-20220701145240404.png)
56 ![image-20220701145153781](picture/image-20220701145153781.png)
/bsp/Infineon/xmc7200-kit_xmc7200_evk/
A DREADME.md58 ![image-20240528161254510](figures/image-20240528161254510.png)
66 ![image-20240528135106931](figures/image-20240528135106931.png)
/bsp/nrf5x/docs/
A DnRF5x系列BSP制作教程.md74 ![image-20210403182242202](images/image-20210403182242202.png)
78 ![image-20210403182031505](images/image-20210403182031505.png)
/bsp/rockchip/rk2108/board/common/
A Dsetting.ini27 File=../../image/rk2108_loader.bin,../../image/rk2108_loader_fake.bin
34 File=../../image/rtthread.img
/bsp/efm32/
A Dapplication.c126 rtgui_image_t* image; in pic_view_event_handler() local
128 image = rtgui_image_create_from_file("jpg", "/test9.jpg", RT_FALSE); in pic_view_event_handler()
142 if (image != RT_NULL) in pic_view_event_handler()
144 rtgui_image_blit(image, dc, &rect); in pic_view_event_handler()
145 rtgui_image_destroy(image); in pic_view_event_handler()
339 rtgui_image_t* image; in photo_view_event_handler() local
353 image = rtgui_image_create_from_file(photo_event->format, in photo_view_event_handler()
355 if (image != RT_NULL) in photo_view_event_handler()
357 rtgui_image_blit(image, dc, &rect); in photo_view_event_handler()
358 rtgui_image_destroy(image); in photo_view_event_handler()
/bsp/rockchip/rk2108/
A Dupdate_fimeware.sh13 $TOOLS/upgrade_tool db $CUR_DIR/image/rk2108_db_loader.bin
14 $TOOLS/upgrade_tool wl 0 $CUR_DIR/image/Firmware.img
/bsp/nxp/imx/imx6ull-smart/
A Demmc.sh9 sudo cp boot.fat image/input/
10 cd image
A DREADME.md92 生成物art-pi.img在rt-thread/bsp/nxp/imx/imx6ull-smart/emmc/image/images下
100 * 在烧写软件的基础版,点击更新uboot![alt text](image-1.png)
102 * 在烧写软件的专业版,烧写制作的映像文件art-pi.img![alt text](image-2.png)
/bsp/x86/
A DREADME.md54 Added to ISO image: directory '/'='/tmp/grub.uLz91i'
56 Added to ISO image: directory '/'='/home/bernard/workspace/rt-thread/bsp/x86/root'
59 ISO image produced: 6007 sectors
/bsp/Infineon/psoc6-cy8ckit-062-BLE/libs/TARGET_CY8CKIT-062-BLE/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct15 ;* This linker script is modified from cy8c6xx7_cm4_dual.sct for CM0P_BLESS image.
18 ;* application image should be placed there.
66 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
69 ; The size of the Cortex-M0+ application flash image
70 ; Size and start address of the Cortex-M0+ application image
111 ; Cortex-M0+ application flash image area
/bsp/Infineon/psoc6-cy8ckit-062-BLE/libs/TARGET_CY8CKIT-062-BLE/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/
A Dlinker.ld7 * This linker script is modified from cy8c6xx7_cm4_dual.ld for CM0P_BLESS image.
14 * application image should be placed there.
87 /* Size and start address of the Cortex-M0+ application image */
90 /* Size and start address of the Cortex-M4 application image */
133 /* Cortex-M0+ application image */
143 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
144 /* Cortex-M4 application image */
293 * any space in the image. The NOLOAD attribute changes the .bss type to
/bsp/Infineon/psoc6-cy8ckit-062s4/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
101 ; Cortex-M0+ application flash image area
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
101 ; Cortex-M0+ application flash image area
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_ffa_drv.h60 ffa_q31_t image; member
68 ffa_q15_t image; member
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/board/linker_scripts/
A Dlink.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/
A Dlinker.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area

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