Home
last modified time | relevance | path

Searched refs:inner (Results 1 – 6 of 6) sorted by relevance

/bsp/CME_M7/StdPeriph_Driver/src/
A Dcmem7_dma.c221 inner->high.INNER.CTL_HI = 0; in DMA_Transfer()
223 inner->high.INNER.CTL_HI_b.DONE = 0; in DMA_Transfer()
225 inner->nextBlock = p->nextBlock; in DMA_Transfer()
227 inner->low.INNER.CTL_LOW = 0; in DMA_Transfer()
228 inner->low.INNER.CTL_LOW_b.INT_EN = TRUE; in DMA_Transfer()
243 if ((uint32_t)inner == (uint32_t)blockList) { in DMA_Transfer()
245 DMA->SAR0 = llp ? 0x0 : inner->srcAddr ; in DMA_Transfer()
246 DMA->DAR0 = llp ? 0x0 : inner->dstAddr ; in DMA_Transfer()
249 DMA->CTL_LOW0 = inner->low.INNER.CTL_LOW; in DMA_Transfer()
251 DMA->LLP0 = llp ? (uint32_t)inner : 0x0; in DMA_Transfer()
[all …]
A Dcmem7_i2c.c240 I2C_INNER_DATA_CMD inner; in I2C_MasterReadReq() local
242 inner.INNER.DATA_CMD_b.DATA = 0; in I2C_MasterReadReq()
243 inner.INNER.DATA_CMD_b.RD_CMD = TRUE; in I2C_MasterReadReq()
244 inner.INNER.DATA_CMD_b.WR_CMD = FALSE; in I2C_MasterReadReq()
245 inner.INNER.DATA_CMD_b.WR_RD_CMD = FALSE; in I2C_MasterReadReq()
247 I2Cx->DATA_CMD = inner.INNER.DATA_CMD; in I2C_MasterReadReq()
284 I2C_INNER_DATA_CMD inner; in I2C_WriteReq() local
286 inner.INNER.DATA_CMD_b.DATA = firstData ; in I2C_WriteReq()
287 inner.INNER.DATA_CMD_b.RD_CMD = FALSE; in I2C_WriteReq()
288 inner.INNER.DATA_CMD_b.WR_CMD = in I2C_WriteReq()
[all …]
A Dcmem7_eth.c571 INNER_ETH_TX_DESC *inner; in ETH_IsFreeTxDesc() local
577 inner = (INNER_ETH_TX_DESC *)desc; in ETH_IsFreeTxDesc()
578 return (inner->TX_0.TX0_b.OWN == ETH_DESC_OWN_BY_SELF) ? TRUE : FALSE; in ETH_IsFreeTxDesc()
582 INNER_ETH_TX_DESC *inner; in ETH_ReleaseTxDesc() local
588 inner = (INNER_ETH_TX_DESC *)desc; in ETH_ReleaseTxDesc()
589 inner->TX_0.TX0_b.OWN = ETH_DESC_OWN_BY_HW; in ETH_ReleaseTxDesc()
659 INNER_ETH_RX_DESC *inner; in ETH_IsFreeRxDesc() local
665 inner = (INNER_ETH_RX_DESC *)desc; in ETH_IsFreeRxDesc()
670 INNER_ETH_RX_DESC *inner; in ETH_ReleaseRxDesc() local
676 inner = (INNER_ETH_RX_DESC *)desc; in ETH_ReleaseRxDesc()
[all …]
/bsp/renesas/ra6e2-fpb/ra/arm/CMSIS_6/CMSIS/Core/Include/
A Dcore_ca.h2659 …32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner) in MMU_MemorySection() argument
2678 switch(inner) in MMU_MemorySection()
2720 …, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_T… in MMU_MemoryPage() argument
2727 MMU_MemorySection(descriptor_l2, mem, outer, inner); in MMU_MemoryPage()
2746 switch(inner) in MMU_MemoryPage()
/bsp/renesas/ra4e2-eco/ra/arm/CMSIS_6/CMSIS/Core/Include/
A Dcore_ca.h2705 …32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner) in MMU_MemorySection() argument
2724 switch(inner) in MMU_MemorySection()
2767 …, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_T… in MMU_MemoryPage() argument
2774 MMU_MemorySection(descriptor_l2, mem, outer, inner); in MMU_MemoryPage()
2793 switch(inner) in MMU_MemoryPage()
/bsp/ESP32_C3/
A DREADME.md100 …1. Ensure Docker is installed and the inner network environment is properly configured. You can ob…

Completed in 41 milliseconds