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Searched refs:int_en (Results 1 – 21 of 21) sorted by relevance

/bsp/synwit/libraries/SWM320_CSL/SWM320_StdPeriph_Driver/
A DSWM320_timr.c51 TIMRG->IE |= (int_en << TIMRG_IE_TIMR0_Pos); in TIMR_Init()
53 if(int_en) NVIC_EnableIRQ(TIMR0_IRQn); in TIMR_Init()
59 TIMRG->IE |= (int_en << TIMRG_IE_TIMR1_Pos); in TIMR_Init()
61 if(int_en) NVIC_EnableIRQ(TIMR1_IRQn); in TIMR_Init()
67 TIMRG->IE |= (int_en << TIMRG_IE_TIMR2_Pos); in TIMR_Init()
69 if(int_en) NVIC_EnableIRQ(TIMR2_IRQn); in TIMR_Init()
77 if(int_en) NVIC_EnableIRQ(TIMR3_IRQn); in TIMR_Init()
85 if(int_en) NVIC_EnableIRQ(TIMR4_IRQn); in TIMR_Init()
93 if(int_en) NVIC_EnableIRQ(TIMR5_IRQn); in TIMR_Init()
392 void Pulse_Init(uint32_t pulse, uint32_t int_en) in Pulse_Init() argument
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A DSWM320_dma.c37 …t32_t src_addr_incr, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en) in DMA_CHM_Config() argument
55 if(int_en) DMA->IM &= ~(1 << chn); in DMA_CHM_Config()
58 if(int_en) in DMA_CHM_Config()
A DSWM320_timr.h7 void TIMR_Init(TIMR_TypeDef * TIMRx, uint32_t mode, uint32_t period, uint32_t int_en); //定时器/计数器初始化
27 void Pulse_Init(uint32_t pulse, uint32_t int_en);
A DSWM320_dma.h10 …, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en); //DMA通道配置，用于存…
/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_timr.c64 if(int_en) NVIC_EnableIRQ(TIMR0_IRQn); in TIMR_Init()
68 if(int_en) NVIC_EnableIRQ(TIMR1_IRQn); in TIMR_Init()
72 if(int_en) NVIC_EnableIRQ(TIMR2_IRQn); in TIMR_Init()
76 if(int_en) NVIC_EnableIRQ(TIMR3_IRQn); in TIMR_Init()
80 if(int_en) NVIC_EnableIRQ(TIMR4_IRQn); in TIMR_Init()
84 if(int_en) NVIC_EnableIRQ(BTIMR0_IRQn); in TIMR_Init()
88 if(int_en) NVIC_EnableIRQ(BTIMR1_IRQn); in TIMR_Init()
92 if(int_en) NVIC_EnableIRQ(BTIMR2_IRQn); in TIMR_Init()
96 if(int_en) NVIC_EnableIRQ(BTIMR3_IRQn); in TIMR_Init()
100 if(int_en) NVIC_EnableIRQ(BTIMR4_IRQn); in TIMR_Init()
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A DSWM341_timr.h10 …MR_TypeDef * TIMRx, uint32_t mode, uint16_t prediv, uint32_t period, uint32_t int_en); //定时器/计数器初始化
/bsp/maxim/libraries/MAX32660PeriphDriver/Source/
A Dspi17y.c136 spi->int_en = 0; in SPI17Y_Shutdown()
307 spi->int_en = 0; in SPI17Y_Handler()
437 uint32_t int_en =0; in SPI17Y_TransHandler() local
501 spi->int_en = 0; in SPI17Y_TransHandler()
502 int_en = 0; in SPI17Y_TransHandler()
557 spi->int_en = 0; in SPI17Y_TransHandler()
558 int_en = 0; in SPI17Y_TransHandler()
570 spi->int_en = 0; in SPI17Y_TransHandler()
571 int_en = 0; in SPI17Y_TransHandler()
580 spi->int_en = int_en; in SPI17Y_TransHandler()
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A Duart.c181 uart->int_en = 0; in UART_Shutdown()
267 uart->int_en &= ~MXC_F_UART_INT_EN_TX_FIFO_ALMOST_EMPTY; // disable interrupt in UART_WriteHandler()
284 uart->int_en &= ~MXC_F_UART_INT_EN_TX_FIFO_ALMOST_EMPTY; in UART_WriteHandler()
296 uart->int_en |= UART_TX_IE | UART_ER_IE; in UART_WriteHandler()
308 uart->int_en &= ~(UART_RX_IE | UART_ER_IE); // disable interrupts in UART_ReadHandler()
346 uart->int_en &= ~(UART_RX_IE | UART_ER_IE); in UART_ReadHandler()
546 uart->int_en |= UART_RX_IE | UART_ER_IE; in UART_ReadAsync()
620 uart->int_en &= (UART_RX_IE | UART_ER_IE); in UART_PrepForSleep()
635 MXC_UART_GET_UART(uart_num)->int_en &= ~(UART_RX_IE | UART_ER_IE); in UART_AbortAsync()
652 MXC_UART_GET_UART(uart_num)->int_en &= ~(UART_TX_IE | UART_ER_IE); in UART_AbortAsync()
A Dspimss.c354 uint32_t int_en =0; in SPIMSS_TransHandler() local
395 int_en = 1; in SPIMSS_TransHandler()
401 int_en = 0; in SPIMSS_TransHandler()
448 int_en = 1; // This will act as a trigger for the next round... in SPIMSS_TransHandler()
454 int_en = 0; in SPIMSS_TransHandler()
467 int_en = 0; in SPIMSS_TransHandler()
475 return int_en; in SPIMSS_TransHandler()
/bsp/efm32/
A Ddrv_acmp.c119 rt_bool_t int_en = false; in rt_acmp_control() local
139 int_en = true; in rt_acmp_control()
145 int_en = true; in rt_acmp_control()
148 if (int_en) in rt_acmp_control()
/bsp/allwinner/libraries/sunxi-hal/hal/source/ce/
A Dhal_ce.c377 uint32_t int_en; in hal_ce_wait_finish() local
378 int_en = ce_readl(CE_REG_ICR) & 0xf; in hal_ce_wait_finish()
379 int_en = int_en & (0x01 << flow); in hal_ce_wait_finish()
380 if (int_en != 0) { in hal_ce_wait_finish()
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/src/
A Dbflb_pwm_v2.c285 void bflb_pwm_v2_int_enable(struct bflb_device_s *dev, uint32_t int_en, bool enable) in bflb_pwm_v2_int_enable() argument
294 regval_mask &= ~int_en; in bflb_pwm_v2_int_enable()
295 regval_en |= int_en; in bflb_pwm_v2_int_enable()
297 regval_mask |= int_en; in bflb_pwm_v2_int_enable()
298 regval_en &= ~int_en; in bflb_pwm_v2_int_enable()
/bsp/maxim/libraries/HAL_Drivers/
A Ddrv_uart.c172 uart->handle->int_en |= MXC_F_UART_INT_EN_RX_FIFO_THRESH | \ in mcu_control()
175 uart->handle->int_en |= MXC_F_UART_INT_EN_RX_FRAME_ERROR | \ in mcu_control()
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_wdg_drv.c71 uint32_t int_en = wdg_ctrl->interrupt_enable ? 1UL : 0UL; in wdg_init() local
79 | WDG_CTRL_INTEN_SET(int_en) in wdg_init()
/bsp/core-v-mcu/Libraries/core_v_hal_libraries/core_v_hal/include/
A Dhal_gpio.h33 uint32_t int_en; member
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/
A Dbflb_pwm_v2.h269 void bflb_pwm_v2_int_enable(struct bflb_device_s *dev, uint32_t int_en, bool enable);
/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/de/lowlevel_v2x/
A Dde_wb_type.h135 unsigned int int_en:1; member
/bsp/core-v-mcu/Libraries/core_v_hal_libraries/core_v_hal/source/
A Dhal_gpio.c168 hgpio->int_en = (uint8_t)((value >> 16) & 0x1); //papbgpio->rdstat_b.inten; in hal_read_gpio_status()
/bsp/maxim/libraries/MAX32660PeriphDriver/CMSIS/Device/Maxim/MAX32660/Include/
A Duart_regs.h92 __IO uint32_t int_en; /**< <tt>\b 0x0C:</tt> UART INT_EN Register */ member
A Dgpio_regs.h102 __IO uint32_t int_en; /**< <tt>\b 0x34:</tt> GPIO INT_EN Register */ member
A Dspi17y_regs.h102 __IO uint32_t int_en; /**< <tt>\b 0x24:</tt> SPI17Y INT_EN Register */ member

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