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Searched refs:ip (Results 1 – 25 of 64) sorted by relevance

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/bsp/renesas/ra8m1-ek/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h53 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
55 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
56 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
61 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
63 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
75 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
77 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
78 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
83 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
85 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/renesas/ra6m3-hmi-board/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h53 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
55 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
56 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
61 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
63 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
75 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
77 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
78 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
83 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
85 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/renesas/ra8d1-ek/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h53 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
55 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
56 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
61 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
63 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
75 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
77 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
78 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
83 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
85 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/renesas/ra8d1-vision-board/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h53 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
55 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
56 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
61 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
63 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
75 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
77 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
78 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
83 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
85 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h46 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
48 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
49 … BSP_MSTP_REG_ ## ip(channel); \
50 … BSP_MSTP_DMY_ ## ip(channel); \
51 … BSP_MSTP_DMY_ ## ip(channel); \
52 … BSP_MSTP_DMY_ ## ip(channel); \
53 … BSP_MSTP_DMY_ ## ip(channel); \
54 … BSP_MSTP_DMY_ ## ip(channel); \
63 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
65 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h46 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
48 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
49 … BSP_MSTP_REG_ ## ip(channel); \
50 … BSP_MSTP_DMY_ ## ip(channel); \
51 … BSP_MSTP_DMY_ ## ip(channel); \
52 … BSP_MSTP_DMY_ ## ip(channel); \
53 … BSP_MSTP_DMY_ ## ip(channel); \
54 … BSP_MSTP_DMY_ ## ip(channel); \
63 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
65 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h46 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
48 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
49 … BSP_MSTP_REG_ ## ip(channel); \
50 … BSP_MSTP_DMY_ ## ip(channel); \
51 … BSP_MSTP_DMY_ ## ip(channel); \
52 … BSP_MSTP_DMY_ ## ip(channel); \
53 … BSP_MSTP_DMY_ ## ip(channel); \
54 … BSP_MSTP_DMY_ ## ip(channel); \
63 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
65 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/mipssim/drivers/
A Dinterrupt.c64 void rt_do_mips_cpu_irq(rt_uint32_t ip) in rt_do_mips_cpu_irq() argument
69 if (ip == 7) { in rt_do_mips_cpu_irq()
72 irq_func = irq_handle_table[ip].handler; in rt_do_mips_cpu_irq()
73 param = irq_handle_table[ip].param; in rt_do_mips_cpu_irq()
76 irq_func(ip, param); in rt_do_mips_cpu_irq()
/bsp/renesas/ra4e2-eco/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h35 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
37 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
38 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
43 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
46 … (BSP_MSTP_REG_TYPE_ ## ip(channel)) ~BSP_MSTP_BIT_ ## ip(channel); \
58 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
60 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
61 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
66 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
68 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/renesas/ra6e2-fpb/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h35 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
37 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
38 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
43 …#define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
46 … (BSP_MSTP_REG_TYPE_ ## ip(channel)) ~BSP_MSTP_BIT_ ## ip(channel); \
58 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
60 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
61 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
66 …#define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; …
68 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
[all …]
/bsp/renesas/ra6m3-ek/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h48 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
50 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
51 … BSP_MSTP_REG_ ## ip(channel); \
60 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
62 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
63 … BSP_MSTP_REG_ ## ip(channel); \
/bsp/renesas/ra6m4-cpk/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h48 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
50 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
51 … BSP_MSTP_REG_ ## ip(channel); \
60 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
62 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
63 … BSP_MSTP_REG_ ## ip(channel); \
/bsp/renesas/ra6m4-iot/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h48 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
50 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
51 … BSP_MSTP_REG_ ## ip(channel); \
60 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
62 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
63 … BSP_MSTP_REG_ ## ip(channel); \
/bsp/renesas/ra2l1-cpk/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h48 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
50 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
51 … BSP_MSTP_REG_ ## ip(channel); \
60 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
62 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
63 … BSP_MSTP_REG_ ## ip(channel); \
/bsp/renesas/ebf_qi_min_6m5/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h52 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
54 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
55 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
64 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
66 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
67 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
/bsp/renesas/ra4m2-eco/ra/fsp/src/bsp/mcu/all/
A Dbsp_module_stop.h48 #define R_BSP_MODULE_START(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
50 … BSP_MSTP_REG_ ## ip(channel) &= ~BSP_MSTP_BIT_ ## ip(channel); \
51 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
60 #define R_BSP_MODULE_STOP(ip, channel) {FSP_CRITICAL_SECTION_DEFINE; … argument
62 … BSP_MSTP_REG_ ## ip(channel) |= BSP_MSTP_BIT_ ## ip(channel); \
63 … FSP_REGISTER_READ(BSP_MSTP_REG_ ## ip(channel)); \
/bsp/dm365/platform/
A Dfindbit.S43 ands ip, r2, #7
49 movs r3, r3, lsr ip @ shift off unused bits
86 ands ip, r2, #7
91 movs r3, r3, lsr ip @ shift off unused bits
120 ands ip, r2, #7
127 movs r3, r3, lsr ip @ shift off unused bits
154 ands ip, r2, #7
160 movs r3, r3, lsr ip @ shift off unused bits
/bsp/loongson/ls2kdev/
A DREADME.md60 需要让开发板和主机处于同一网段，利用pmon的tftp进行固件传输。首先查看主机的ip地址，如果`ifconfig`查看ip是`192.168.12.35`。输入以下指令开始运行。
96 设置开发板的IP地址，在进入pmon的控制台后，输入`set ifconfig syn0:10.1.1.100`。其中`syn0`后面的ip地址为开发板的ip地址，与存放rt-thread固件的TF…
109 其中`tftp://10.1.1.118/rtthread.elf`中的`10.1.1.118`为tftp服务器的ip地址。
/bsp/efm32/
A Ddrv_ethernet.c1082 rt_err_t get_ip(char *ip) in get_ip() argument
1157 if (ip != NULL) in get_ip()
1177 rt_uint8_t ip[20]; in list_myip() local
1179 if (get_ip(ip) != RT_EOK) in list_myip()
1185 rt_kprintf("Current IP: [%s]\n", ip); in list_myip()
1193 rt_err_t update_ip(char *ip) in update_ip() argument
1217 len2 = rt_strlen(ip); in update_ip()
1218 rt_memcpy(&query[len], ip, len2); in update_ip()
1300 void update_myip(char *ip) in update_myip() argument
1304 if (update_ip(ip) != RT_EOK) in update_myip()
[all …]
/bsp/loongson/ls2kdev/drivers/
A Dinterrupt.c196 void rt_do_mips_cpu_irq(rt_uint32_t ip) in rt_do_mips_cpu_irq() argument
200 if (ip == 7) in rt_do_mips_cpu_irq()
204 else if (ip == 2) in rt_do_mips_cpu_irq()
208 else if (ip == 3) in rt_do_mips_cpu_irq()
/bsp/raspberry-pi/raspi3-32/cpu/
A Darmv7.h29 unsigned long ip; member
51 unsigned long ip; member
/bsp/raspberry-pi/raspi2/cpu/
A Darmv7.h19 unsigned long ip; member
41 unsigned long ip; member
/bsp/nxp/imx/imx6sx/cortex-a9/cpu/
A Darmv7.h19 unsigned long ip; member
41 unsigned long ip; member
/bsp/rockchip/common/rk_hal/lib/hal/src/pm/
A Dhal_pm_cpu.c161 uint8_t ip[NVIC_EXT_IP_NUM]; /* Interrupt Priority Register */ member
191 nvicSave.ip[i] = pnvic->IP[i]; in HAL_NVIC_SuspendSave()
206 pnvic->IP[i] = nvicSave.ip[i]; in HAL_NVIC_ResumeRestore()
/bsp/ft2004/
A DREADME.md159 setenv ipaddr 192.168.x.x # 设置开发板ip
160 setenv serverip 192.168.x.x # 设置tftp服务器ip
161 setenv gatewayip 192.168.x.x # 设置网关ip

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