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Searched refs:kSCG_AsyncClkDisable (Results 1 – 3 of 3) sorted by relevance

/bsp/rv32m1_vega/ri5cy/board/
A Dclock_config.c69 .div1 = kSCG_AsyncClkDisable, in CLOCK_CONFIG_FircSafeConfig()
144 ….div1 = kSCG_AsyncClkDisable, /* System OSC Clock Divider 1: Clock output is disabled …
145 ….div2 = kSCG_AsyncClkDisable, /* System OSC Clock Divider 2: Clock output is disabled …
146 ….div3 = kSCG_AsyncClkDisable, /* System OSC Clock Divider 3: Clock output is disabled …
151 … .div1 = kSCG_AsyncClkDisable, /* Slow IRC Clock Divider 1: Clock output is disabled */
152 … .div2 = kSCG_AsyncClkDisable, /* Slow IRC Clock Divider 2: Clock output is disabled */
251 ….div1 = kSCG_AsyncClkDisable, /* System OSC Clock Divider 1: Clock output is disabled …
258 … .div1 = kSCG_AsyncClkDisable, /* Slow IRC Clock Divider 1: Clock output is disabled */
259 … .div2 = kSCG_AsyncClkDisable, /* Slow IRC Clock Divider 2: Clock output is disabled */
382 … .div2 = kSCG_AsyncClkDisable, /* Fast IRC Clock Divider 2: Clock output is disabled */
[all …]
A Dboard.c43 .div2 = kSCG_AsyncClkDisable, /* Low Power FLL Clock Divider 2: Clock output is disabled */
44 .div3 = kSCG_AsyncClkDisable, /* Low Power FLL Clock Divider 3: Clock output is disabled */
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_clock.h501 kSCG_AsyncClkDisable = 0U, /*!< Clock output is disabled. */ enumerator

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