Home
last modified time | relevance | path

Searched refs:kSCG_SysClkDivBy2 (Results 1 – 2 of 2) sorted by relevance

/bsp/rv32m1_vega/ri5cy/board/
A Dclock_config.c133 .divSlow = kSCG_SysClkDivBy2, /* Slow Clock Divider: divided by 2 */
356 .divBus = kSCG_SysClkDivBy2, /* Bus Clock Divider: divided by 2 */
358 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_clock.h441 kSCG_SysClkDivBy2 = 1U, /*!< Divided by 2. */ enumerator

Completed in 619 milliseconds