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Searched refs:mask (Results 1 – 25 of 994) sorted by relevance

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/bsp/maxim/libraries/MAX32660PeriphDriver/Source/
A Dgpio.c167 gpio->out_set = cfg->mask; in GPIO_OutSet()
175 gpio->out_clr = cfg->mask; in GPIO_OutClr()
191 gpio->out = (gpio->out & ~cfg->mask) | (val & cfg->mask); in GPIO_OutPut()
199 gpio->out ^= cfg->mask; in GPIO_OutToggle()
242 gpio->int_en_set = cfg->mask; in GPIO_IntEnable()
266 gpio->int_clr = cfg->mask; in GPIO_IntClr()
272 uint32_t mask; in GPIO_RegisterCallback() local
275 mask = cfg->mask; in GPIO_RegisterCallback()
278 while (mask) { in GPIO_RegisterCallback()
279 if (mask & 1) { in GPIO_RegisterCallback()
[all …]
/bsp/microchip/samc21/bsp/hri/
A Dhri_systemcontrol_c21.h124 tmp &= mask; in hri_systemcontrol_get_CPUID_reg()
148 tmp &= mask; in hri_systemcontrol_get_CCR_reg()
169 tmp &= mask; in hri_systemcontrol_get_ICSR_reg()
211 tmp &= mask; in hri_systemcontrol_get_VTOR_reg()
253 tmp &= mask; in hri_systemcontrol_get_AIRCR_reg()
286 ((Systemcontrol *)hw)->SCR.reg |= mask; in hri_systemcontrol_set_SCR_reg()
295 tmp &= mask; in hri_systemcontrol_get_SCR_reg()
337 tmp &= mask; in hri_systemcontrol_get_SHPR2_reg()
379 tmp &= mask; in hri_systemcontrol_get_SHPR3_reg()
421 tmp &= mask; in hri_systemcontrol_get_SHCSR_reg()
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A Dhri_mtb_c21.h87 tmp &= mask; in hri_mtb_get_CLAIM_reg()
111 tmp &= mask; in hri_mtb_get_BASE_reg()
124 tmp &= mask; in hri_mtb_get_LOCKSTATUS_reg()
137 tmp &= mask; in hri_mtb_get_AUTHSTATUS_reg()
150 tmp &= mask; in hri_mtb_get_DEVARCH_reg()
163 tmp &= mask; in hri_mtb_get_DEVID_reg()
176 tmp &= mask; in hri_mtb_get_DEVTYPE_reg()
189 tmp &= mask; in hri_mtb_get_PID4_reg()
202 tmp &= mask; in hri_mtb_get_PID5_reg()
215 tmp &= mask; in hri_mtb_get_PID6_reg()
[all …]
A Dhri_hmatrixb_c21.h74 tmp &= mask; in hri_hmatrixb_get_MCFG_reg()
116 tmp &= mask; in hri_hmatrixb_get_SCFG_reg()
149 ((Hmatrixb *)hw)->MRCR.reg |= mask; in hri_hmatrixb_set_MRCR_reg()
157 tmp &= mask; in hri_hmatrixb_get_MRCR_reg()
171 ((Hmatrixb *)hw)->MRCR.reg &= ~mask; in hri_hmatrixb_clear_MRCR_reg()
178 ((Hmatrixb *)hw)->MRCR.reg ^= mask; in hri_hmatrixb_toggle_MRCR_reg()
199 tmp &= mask; in hri_hmatrixb_get_SFR_reg()
240 tmp &= mask; in hri_hmatrixbprs_get_PRAS_reg()
281 tmp &= mask; in hri_hmatrixbprs_get_PRBS_reg()
324 tmp &= mask; in hri_hmatrixb_get_PRAS_reg()
[all …]
A Dhri_dsu_c21.h109 tmp &= mask; in hri_dsu_get_STATUSB_reg()
132 tmp &= mask; in hri_dsu_get_STATUSC_reg()
205 tmp &= mask; in hri_dsu_get_DID_reg()
238 tmp &= mask; in hri_dsu_get_ENTRY0_reg()
251 tmp &= mask; in hri_dsu_get_ENTRY1_reg()
274 tmp &= mask; in hri_dsu_get_END_reg()
292 tmp &= mask; in hri_dsu_get_MEMTYPE_reg()
325 tmp &= mask; in hri_dsu_get_PID4_reg()
338 tmp &= mask; in hri_dsu_get_PID5_reg()
351 tmp &= mask; in hri_dsu_get_PID6_reg()
[all …]
A Dhri_nvic_c21.h62 ((Nvic *)hw)->ISER.reg |= mask; in hri_nvic_set_ISER_reg()
70 tmp &= mask; in hri_nvic_get_ISER_reg()
84 ((Nvic *)hw)->ISER.reg &= ~mask; in hri_nvic_clear_ISER_reg()
91 ((Nvic *)hw)->ISER.reg ^= mask; in hri_nvic_toggle_ISER_reg()
103 ((Nvic *)hw)->ICER.reg |= mask; in hri_nvic_set_ICER_reg()
111 tmp &= mask; in hri_nvic_get_ICER_reg()
132 ((Nvic *)hw)->ICER.reg ^= mask; in hri_nvic_toggle_ICER_reg()
144 ((Nvic *)hw)->ISPR.reg |= mask; in hri_nvic_set_ISPR_reg()
152 tmp &= mask; in hri_nvic_get_ISPR_reg()
193 tmp &= mask; in hri_nvic_get_ICPR_reg()
[all …]
A Dhri_nvmctrl_c21.h109 tmp &= mask; in hri_nvmctrl_get_INTFLAG_reg()
120 ((Nvmctrl *)hw)->INTFLAG.reg = mask; in hri_nvmctrl_clear_INTFLAG_reg()
181 tmp &= mask; in hri_nvmctrl_get_INTEN_reg()
206 tmp &= mask; in hri_nvmctrl_get_PBLDATA0_reg()
220 tmp &= mask; in hri_nvmctrl_get_PBLDATA1_reg()
336 tmp &= mask; in hri_nvmctrl_get_CTRLA_reg()
612 tmp &= mask; in hri_nvmctrl_get_CTRLB_reg()
798 tmp &= mask; in hri_nvmctrl_get_PARAM_reg()
887 tmp &= mask; in hri_nvmctrl_get_ADDR_reg()
976 tmp &= mask; in hri_nvmctrl_get_LOCK_reg()
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A Dhri_mpu_c21.h88 tmp &= mask; in hri_mpu_get_TYPE_reg()
100 ((Mpu *)hw)->CTRL.reg |= mask; in hri_mpu_set_CTRL_reg()
108 tmp &= mask; in hri_mpu_get_CTRL_reg()
129 ((Mpu *)hw)->CTRL.reg ^= mask; in hri_mpu_toggle_CTRL_reg()
141 ((Mpu *)hw)->RNR.reg |= mask; in hri_mpu_set_RNR_reg()
149 tmp &= mask; in hri_mpu_get_RNR_reg()
163 ((Mpu *)hw)->RNR.reg &= ~mask; in hri_mpu_clear_RNR_reg()
170 ((Mpu *)hw)->RNR.reg ^= mask; in hri_mpu_toggle_RNR_reg()
182 ((Mpu *)hw)->RBAR.reg |= mask; in hri_mpu_set_RBAR_reg()
190 tmp &= mask; in hri_mpu_get_RBAR_reg()
[all …]
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_icm_d51.h79 tmp &= mask; in hri_icmdescriptor_get_RADDR_reg()
121 tmp &= mask; in hri_icmdescriptor_get_RCFG_reg()
163 tmp &= mask; in hri_icmdescriptor_get_RCTRL_reg()
205 tmp &= mask; in hri_icmdescriptor_get_RNEXT_reg()
460 tmp &= mask; in hri_icm_get_IMR_reg()
509 tmp &= mask; in hri_icm_get_SR_reg()
587 tmp &= mask; in hri_icm_get_ISR_reg()
610 tmp &= mask; in hri_icm_get_UASR_reg()
630 tmp &= mask; in hri_icm_get_CFG_reg()
671 tmp &= mask; in hri_icm_get_DSCR_reg()
[all …]
A Dhri_dsu_d51.h113 tmp &= mask; in hri_dsu_get_STATUSB_reg()
186 tmp &= mask; in hri_dsu_get_DID_reg()
219 tmp &= mask; in hri_dsu_get_ENTRY0_reg()
232 tmp &= mask; in hri_dsu_get_ENTRY1_reg()
255 tmp &= mask; in hri_dsu_get_END_reg()
273 tmp &= mask; in hri_dsu_get_MEMTYPE_reg()
306 tmp &= mask; in hri_dsu_get_PID4_reg()
319 tmp &= mask; in hri_dsu_get_PID5_reg()
332 tmp &= mask; in hri_dsu_get_PID6_reg()
345 tmp &= mask; in hri_dsu_get_PID7_reg()
[all …]
A Dhri_pm_d51.h86 tmp &= mask; in hri_pm_get_INTFLAG_reg()
97 ((Pm *)hw)->INTFLAG.reg = mask; in hri_pm_clear_INTFLAG_reg()
133 tmp &= mask; in hri_pm_get_INTEN_reg()
196 ((Pm *)hw)->CTRLA.reg |= mask; in hri_pm_set_CTRLA_reg()
204 tmp &= mask; in hri_pm_get_CTRLA_reg()
225 ((Pm *)hw)->CTRLA.reg ^= mask; in hri_pm_toggle_CTRLA_reg()
293 tmp &= mask; in hri_pm_get_SLEEPCFG_reg()
430 tmp &= mask; in hri_pm_get_STDBYCFG_reg()
567 tmp &= mask; in hri_pm_get_HIBCFG_reg()
656 tmp &= mask; in hri_pm_get_BKUPCFG_reg()
[all …]
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_icm_d51.h79 tmp &= mask; in hri_icmdescriptor_get_RADDR_reg()
121 tmp &= mask; in hri_icmdescriptor_get_RCFG_reg()
163 tmp &= mask; in hri_icmdescriptor_get_RCTRL_reg()
205 tmp &= mask; in hri_icmdescriptor_get_RNEXT_reg()
460 tmp &= mask; in hri_icm_get_IMR_reg()
509 tmp &= mask; in hri_icm_get_SR_reg()
587 tmp &= mask; in hri_icm_get_ISR_reg()
610 tmp &= mask; in hri_icm_get_UASR_reg()
630 tmp &= mask; in hri_icm_get_CFG_reg()
671 tmp &= mask; in hri_icm_get_DSCR_reg()
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A Dhri_dsu_d51.h113 tmp &= mask; in hri_dsu_get_STATUSB_reg()
186 tmp &= mask; in hri_dsu_get_DID_reg()
219 tmp &= mask; in hri_dsu_get_ENTRY0_reg()
232 tmp &= mask; in hri_dsu_get_ENTRY1_reg()
255 tmp &= mask; in hri_dsu_get_END_reg()
273 tmp &= mask; in hri_dsu_get_MEMTYPE_reg()
306 tmp &= mask; in hri_dsu_get_PID4_reg()
319 tmp &= mask; in hri_dsu_get_PID5_reg()
332 tmp &= mask; in hri_dsu_get_PID6_reg()
345 tmp &= mask; in hri_dsu_get_PID7_reg()
[all …]
A Dhri_pm_d51.h86 tmp &= mask; in hri_pm_get_INTFLAG_reg()
97 ((Pm *)hw)->INTFLAG.reg = mask; in hri_pm_clear_INTFLAG_reg()
133 tmp &= mask; in hri_pm_get_INTEN_reg()
196 ((Pm *)hw)->CTRLA.reg |= mask; in hri_pm_set_CTRLA_reg()
204 tmp &= mask; in hri_pm_get_CTRLA_reg()
225 ((Pm *)hw)->CTRLA.reg ^= mask; in hri_pm_toggle_CTRLA_reg()
293 tmp &= mask; in hri_pm_get_SLEEPCFG_reg()
430 tmp &= mask; in hri_pm_get_STDBYCFG_reg()
567 tmp &= mask; in hri_pm_get_HIBCFG_reg()
656 tmp &= mask; in hri_pm_get_BKUPCFG_reg()
[all …]
/bsp/microchip/same54/bsp/hri/
A Dhri_icm_e54.h79 tmp &= mask; in hri_icmdescriptor_get_RADDR_reg()
121 tmp &= mask; in hri_icmdescriptor_get_RCFG_reg()
163 tmp &= mask; in hri_icmdescriptor_get_RCTRL_reg()
205 tmp &= mask; in hri_icmdescriptor_get_RNEXT_reg()
460 tmp &= mask; in hri_icm_get_IMR_reg()
509 tmp &= mask; in hri_icm_get_SR_reg()
587 tmp &= mask; in hri_icm_get_ISR_reg()
610 tmp &= mask; in hri_icm_get_UASR_reg()
630 tmp &= mask; in hri_icm_get_CFG_reg()
671 tmp &= mask; in hri_icm_get_DSCR_reg()
[all …]
A Dhri_gmac_e54.h167 tmp &= mask; in hri_gmacsa_get_SAB_reg()
208 tmp &= mask; in hri_gmacsa_get_SAT_reg()
250 tmp &= mask; in hri_gmac_get_SAB_reg()
292 tmp &= mask; in hri_gmac_get_SAT_reg()
931 tmp &= mask; in hri_gmac_get_IMR_reg()
965 tmp &= mask; in hri_gmac_get_NSR_reg()
988 tmp &= mask; in hri_gmac_get_RPQ_reg()
1011 tmp &= mask; in hri_gmac_get_EFTSH_reg()
1034 tmp &= mask; in hri_gmac_get_EFRSH_reg()
1057 tmp &= mask; in hri_gmac_get_PEFTSH_reg()
[all …]
A Dhri_dsu_e54.h113 tmp &= mask; in hri_dsu_get_STATUSB_reg()
186 tmp &= mask; in hri_dsu_get_DID_reg()
219 tmp &= mask; in hri_dsu_get_ENTRY0_reg()
232 tmp &= mask; in hri_dsu_get_ENTRY1_reg()
255 tmp &= mask; in hri_dsu_get_END_reg()
273 tmp &= mask; in hri_dsu_get_MEMTYPE_reg()
306 tmp &= mask; in hri_dsu_get_PID4_reg()
319 tmp &= mask; in hri_dsu_get_PID5_reg()
332 tmp &= mask; in hri_dsu_get_PID6_reg()
345 tmp &= mask; in hri_dsu_get_PID7_reg()
[all …]
A Dhri_pm_e54.h86 tmp &= mask; in hri_pm_get_INTFLAG_reg()
97 ((Pm *)hw)->INTFLAG.reg = mask; in hri_pm_clear_INTFLAG_reg()
133 tmp &= mask; in hri_pm_get_INTEN_reg()
196 ((Pm *)hw)->CTRLA.reg |= mask; in hri_pm_set_CTRLA_reg()
204 tmp &= mask; in hri_pm_get_CTRLA_reg()
225 ((Pm *)hw)->CTRLA.reg ^= mask; in hri_pm_toggle_CTRLA_reg()
293 tmp &= mask; in hri_pm_get_SLEEPCFG_reg()
430 tmp &= mask; in hri_pm_get_STDBYCFG_reg()
567 tmp &= mask; in hri_pm_get_HIBCFG_reg()
656 tmp &= mask; in hri_pm_get_BKUPCFG_reg()
[all …]
/bsp/microchip/same70/bsp/hri/
A Dhri_sdramc_e70b.h73 tmp &= mask; in hri_sdramc_get_ISR_reg()
108 ((Sdramc *)hw)->SDRAMC_IER = mask; in hri_sdramc_set_IMR_reg()
115 tmp &= mask; in hri_sdramc_get_IMR_reg()
132 ((Sdramc *)hw)->SDRAMC_IDR = mask; in hri_sdramc_clear_IMR_reg()
194 tmp &= mask; in hri_sdramc_get_MR_reg()
283 tmp &= mask; in hri_sdramc_get_TR_reg()
836 tmp &= mask; in hri_sdramc_get_CR_reg()
1117 tmp &= mask; in hri_sdramc_get_LPR_reg()
1206 tmp &= mask; in hri_sdramc_get_MDR_reg()
1335 tmp &= mask; in hri_sdramc_get_CFR1_reg()
[all …]
A Dhri_ssc_e70b.h270 tmp &= mask; in hri_ssc_get_IMR_reg()
304 tmp &= mask; in hri_ssc_get_RHR_reg()
327 tmp &= mask; in hri_ssc_get_RSHR_reg()
390 tmp &= mask; in hri_ssc_get_SR_reg()
418 tmp &= mask; in hri_ssc_get_WPSR_reg()
486 tmp &= mask; in hri_ssc_get_CMR_reg()
895 tmp &= mask; in hri_ssc_get_RCMR_reg()
1296 tmp &= mask; in hri_ssc_get_RFMR_reg()
1665 tmp &= mask; in hri_ssc_get_TCMR_reg()
2106 tmp &= mask; in hri_ssc_get_TFMR_reg()
[all …]
A Dhri_gmac_e70b.h301 tmp &= mask; in hri_gmac_get_ISR_reg()
350 tmp &= mask; in hri_gmac_get_ISRPQ_reg()
992 tmp &= mask; in hri_gmac_get_IMR_reg()
1190 tmp &= mask; in hri_gmac_get_IMRPQ_reg()
1229 tmp &= mask; in hri_gmac_get_NSR_reg()
1252 tmp &= mask; in hri_gmac_get_RPQ_reg()
1275 tmp &= mask; in hri_gmac_get_EFTSH_reg()
1298 tmp &= mask; in hri_gmac_get_EFRSH_reg()
1321 tmp &= mask; in hri_gmac_get_PEFTSH_reg()
1344 tmp &= mask; in hri_gmac_get_PEFRSH_reg()
[all …]
A Dhri_aes_e70b.h86 tmp &= mask; in hri_aes_get_ISR_reg()
169 ((Aes *)hw)->AES_IER = mask; in hri_aes_set_IMR_reg()
176 tmp &= mask; in hri_aes_get_IMR_reg()
212 tmp &= mask; in hri_aes_get_ODATAR_reg()
235 tmp &= mask; in hri_aes_get_TAGR_reg()
258 tmp &= mask; in hri_aes_get_CTRR_reg()
726 tmp &= mask; in hri_aes_get_MR_reg()
815 tmp &= mask; in hri_aes_get_AADLENR_reg()
904 tmp &= mask; in hri_aes_get_CLENR_reg()
995 tmp &= mask; in hri_aes_get_GHASHR_reg()
[all …]
/bsp/nxp/lpc/lpc178x/drivers/
A Dlpc177x_8x_emc.c149 uint32_t mask = ~(uint32_t)(2); in EMC_DynCtrlClockControl() local
162 uint32_t mask = ~(uint32_t)(4); in EMC_DynCtrlSelfRefresh() local
175 uint32_t mask = ~(uint32_t)(_BIT(5)); in EMC_DynCtrlMMC() local
190 uint32_t mask = ~(uint32_t)(_SBF(7,0x03)); in EMC_DynCtrlSDRAMInit() local
203 uint32_t mask = ~(uint32_t)(_BIT(13)); in EMC_DynCtrlPowerDownMode() local
402 uint32_t mask = ~(uint32_t)(0x03) ; in EMC_DynMemRAS() local
457 uint32_t mask = ~(uint32_t)(0x03) ; in EMC_StaMemConfigMW() local
484 uint32_t mask = ~(uint32_t)(_BIT(3)) ; in EMC_StaMemConfigPM() local
511 uint32_t mask = ~(uint32_t)(_BIT(6)) ; in EMC_StaMemConfigPC() local
539 uint32_t mask = ~(uint32_t)(_BIT(7)) ; in EMC_StaMemConfigPB() local
[all …]
/bsp/microchip/saml10/bsp/hri/
A Dhri_dsu_l10.h126 tmp &= mask; in hri_dsu_get_STATUSB_reg()
139 tmp &= mask; in hri_dsu_get_STATUSC_reg()
212 tmp &= mask; in hri_dsu_get_DID_reg()
245 tmp &= mask; in hri_dsu_get_ENTRY0_reg()
258 tmp &= mask; in hri_dsu_get_ENTRY1_reg()
281 tmp &= mask; in hri_dsu_get_END_reg()
299 tmp &= mask; in hri_dsu_get_MEMTYPE_reg()
332 tmp &= mask; in hri_dsu_get_PID4_reg()
345 tmp &= mask; in hri_dsu_get_PID5_reg()
358 tmp &= mask; in hri_dsu_get_PID6_reg()
[all …]
/bsp/samd21/sam_d2x_asflib/common/services/ioport/sam/
A Dioport_pio.h193 base->PIO_PUER = mask; in arch_ioport_set_port_mode()
195 base->PIO_PUDR = mask; in arch_ioport_set_port_mode()
207 base->PIO_MDER = mask; in arch_ioport_set_port_mode()
209 base->PIO_MDDR = mask; in arch_ioport_set_port_mode()
266 base->PIO_OER = mask; in arch_ioport_set_port_dir()
268 base->PIO_ODR = mask; in arch_ioport_set_port_dir()
271 base->PIO_OWER = mask; in arch_ioport_set_port_dir()
354 base->PIO_LSR = mask; in arch_ioport_set_port_sense_mode()
358 base->PIO_LSR = mask; in arch_ioport_set_port_sense_mode()
362 base->PIO_ESR = mask; in arch_ioport_set_port_sense_mode()
[all …]

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