Searched refs:mibspiREG5 (Results 1 – 2 of 2) sorted by relevance

/bsp/rm48x50/HALCoGen/source/
A D	sys_startup.c	178 mibspiREG5->GCR0 = 0x1U; in _c_int00() 200 while ((mibspiREG5->FLG & 0x01000000U) == 0x01000000U) in _c_int00()
/bsp/rm48x50/HALCoGen/include/
A D	reg_mibspi.h	130 #define mibspiREG5 ((mibspiBASE_t *)0xFFF7FC00U) macro

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