| /bsp/k210/board/ |
| A D | interrupt.c | 34 set_csr(mie, MIP_MSIP); in rt_hw_clint_ipi_enable()
41 clear_csr(mie, MIP_MSIP); in rt_hw_clint_ipi_disable()
111 set_csr(mie, MIP_MEIP); in rt_hw_interrupt_init()
129 set_csr(mie, MIP_MEIP); in rt_hw_scondary_interrupt_init()
219 uint64_t ie_flag = read_csr(mie); in rt_hw_irq_isr()
228 clear_csr(mie, MIP_MTIP | MIP_MSIP); in rt_hw_irq_isr()
245 write_csr(mie, ie_flag); in rt_hw_irq_isr()
|
| A D | tick.c | 38 clear_csr(mie, MIP_MTIP); in rt_hw_tick_init()
46 set_csr(mie, MIP_MTIP); in rt_hw_tick_init()
|
| /bsp/cvitek/c906_little/board/ |
| A D | tick.c | 51 clear_csr(mie, MIP_MTIP); in rt_hw_tick_init()
60 set_csr(mie, MIP_MTIP); in rt_hw_tick_init()
|
| A D | interrupt.c | 79 set_csr(mie, MIP_MEIP); in plic_init()
|
| A D | start.S | 64 csrw mie, 0
|
| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/r910/ |
| A D | system.c | 210 uint32_t mie = __get_MIE(); in interrupt_init() local
211 mie |= (1 << 11 | 1 << 7 | 1 << 3); in interrupt_init()
213 mie |= (1 << 16); in interrupt_init()
215 __set_MIE(mie); in interrupt_init()
|
| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c908v/ |
| A D | system.c | 210 uint32_t mie = __get_MIE(); in interrupt_init() local
211 mie |= (1 << 11 | 1 << 7 | 1 << 3); in interrupt_init()
213 mie |= (1 << 16); in interrupt_init()
215 __set_MIE(mie); in interrupt_init()
|
| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/r920/ |
| A D | system.c | 210 uint32_t mie = __get_MIE(); in interrupt_init() local
211 mie |= (1 << 11 | 1 << 7 | 1 << 3); in interrupt_init()
213 mie |= (1 << 16); in interrupt_init()
215 __set_MIE(mie); in interrupt_init()
|
| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c920v3/ |
| A D | system.c | 210 uint32_t mie = __get_MIE(); in interrupt_init() local
211 mie |= (1 << 11 | 1 << 7 | 1 << 3); in interrupt_init()
213 mie |= (1 << 16); in interrupt_init()
215 __set_MIE(mie); in interrupt_init()
|
| A D | startup.S | 71 csrw mie, zero
|
| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c907/ |
| A D | system.c | 210 uint32_t mie = __get_MIE(); in interrupt_init() local
211 mie |= (1 << 11 | 1 << 7 | 1 << 3); in interrupt_init()
213 mie |= (1 << 16); in interrupt_init()
215 __set_MIE(mie); in interrupt_init()
|
| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c910v3/ |
| A D | system.c | 210 uint32_t mie = __get_MIE(); in interrupt_init() local
211 mie |= (1 << 11 | 1 << 7 | 1 << 3); in interrupt_init()
213 mie |= (1 << 16); in interrupt_init()
215 __set_MIE(mie); in interrupt_init()
|
| /bsp/core-v-mcu/Libraries/core_v_hal_libraries/bmsis/core-v-mcu/source/ |
| A D | crt0.S | 51 csrw mie, a0 // disable interrupts
52 csrr a0, mie
|
| /bsp/xuantie/virt64/c906/libcpu/ |
| A D | plic.c | 58 set_csr(mie, read_csr(mie) | MIP_MEIP); in plic_irq_enable()
|
| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/c906fd/ |
| A D | system.c | 200 uint32_t mie = __get_MIE(); in interrupt_init() local
201 mie |= (1 << 11 | 1 << 7 | 1 << 3); in interrupt_init()
202 __set_MIE(mie); in interrupt_init()
|
| A D | startup.S | 64 csrw mie, zero
|
| /bsp/xuantie/libraries/xuantie_libraries/chip_riscv_dummy/src/arch/r908/ |
| A D | system.c | 278 uint32_t mie = __get_MIE(); in interrupt_init() local
279 mie |= (1 << 11 | 1 << 7 | 1 << 3); in interrupt_init()
281 mie |= (1 << 16); in interrupt_init()
283 __set_MIE(mie); in interrupt_init()
|
| /bsp/sparkfun-redv/drivers/ |
| A D | board.c | 64 set_csr(mie, MIP_MTIP); in rt_hw_timer_init()
|
| A D | interrupt.c | 91 set_csr(mie, MIP_MEIP); in rt_hw_interrupt_init()
|
| /bsp/hifive1/drivers/ |
| A D | board.c | 50 set_csr(mie, MIP_MTIP); in rt_hw_timer_init()
|
| A D | interrupt.c | 77 set_csr(mie, MIP_MEIP); in rt_hw_interrupt_init()
|
| /bsp/juicevm/board/ |
| A D | startup_gcc.S | 18 csrw mie, 0
|
| /bsp/hifive1/freedom-e-sdk/bsp/include/sifive/ |
| A D | smp.h | 36 csrw mie, reg2 ;\
|
| /bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/ |
| A D | smp.h | 36 csrw mie, reg2 ;\
|
| /bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/soc/bl808/std/startup/d0/ |
| A D | start.S | 31 csrw mie, zero
|