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Searched refs:modulator (Results 1 – 16 of 16) sorted by relevance

/bsp/stm32/stm32f413-st-nucleo/
A DREADME.md41 - 6x digital filters for sigma delta modulator, 12x PDM interfaces, with stereo microphone and soun…
/bsp/stm32/stm32f412-st-nucleo/
A DREADME.md42 - 2xdigital filters for sigma delta modulator, 4xPDM interfaces, stereo microphone support
/bsp/stm32/stm32l496-st-nucleo/
A DREADME.md59 - 4 x digital filters for sigma delta modulator
/bsp/stm32/stm32h743-st-nucleo/
A DREADME.md72 - 1× digital filters for sigma delta modulator (DFSDM) with 8 channels/4 filters
/bsp/stm32/stm32h723-st-nucleo/
A DREADME.md44 - Digital filters for sigma delta modulator (DFSDM)
/bsp/stm32/stm32f767-st-nucleo/
A DREADME.md42 - Digital filters for sigma delta modulator (DFSDM), 8 channels / 4 filters
/bsp/stm32/stm32l476-st-nucleo/
A DREADME.md59 - 4x digital filters for sigma delta modulator
/bsp/stm32/stm32l552-st-nucleo/
A DREADME.md73 - 1× digital filters for sigma delta modulator (DFSDM) with 8 channels/4 filters
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A Dcycfg_capsense.h2298 …#warning The maximum CSD modulator clock frequency is 50 MHz: increase CSD modulator clock divider…
2302 …#warning The maximum CSX modulator clock frequency is 50 MHz: increase CSX modulator clock divider…
/bsp/Infineon/psoc6-cy8ckit-062-BLE/libs/TARGET_CY8CKIT-062-BLE/config/GeneratedSource/
A Dcycfg_capsense.h2298 …#warning The maximum CSD modulator clock frequency is 50 MHz: increase CSD modulator clock divider…
2302 …#warning The maximum CSX modulator clock frequency is 50 MHz: increase CSX modulator clock divider…
/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/libs/TARGET_CY8CKIT-062-WIFI-BT/config/GeneratedSource/
A Dcycfg_capsense.h2298 …#warning The maximum CSD modulator clock frequency is 50 MHz: increase CSD modulator clock divider…
2302 …#warning The maximum CSX modulator clock frequency is 50 MHz: increase CSX modulator clock divider…
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A Dcycfg_capsense.h2298 …#warning The maximum CSD modulator clock frequency is 50 MHz: increase CSD modulator clock divider…
2302 …#warning The maximum CSX modulator clock frequency is 50 MHz: increase CSX modulator clock divider…
/bsp/allwinner/libraries/sunxi-hal/hal/source/usb/uvc/Include/
A Dvideodev2.h931 __u32 modulator; /* Associated modulator */ member
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/config/GeneratedSource/
A Dcycfg_capsense.h2244 …#warning The maximum CSD modulator clock frequency is 50 MHz: increase CSD modulator clock divider…
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/config/GeneratedSource/
A Dcycfg_capsense.h2256 …#warning The maximum CSD modulator clock frequency is 50 MHz: increase CSD modulator clock divider…
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/config/GeneratedSource/
A Dcycfg_capsense.h2244 …#warning The maximum CSD modulator clock frequency is 50 MHz: increase CSD modulator clock divider…

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