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Searched refs:mul_div (Results 1 – 2 of 2) sorted by relevance

/bsp/hpmicro/hpm6750evk/board/
A Dhpm_sgtl5000.c474 uint32_t mul_div = 0U; in sgtl_config_data_format() local
574 mul_div = mclk / sysFs; in sgtl_config_data_format()
576 if (sgtl_check_clock_tolerance(mul_div, 256)) { in sgtl_config_data_format()
577 mul_div = 256; in sgtl_config_data_format()
578 } else if (sgtl_check_clock_tolerance(mul_div, 384)) { in sgtl_config_data_format()
579 mul_div = 384; in sgtl_config_data_format()
580 } else if (sgtl_check_clock_tolerance(mul_div, 512)) { in sgtl_config_data_format()
581 mul_div = 512; in sgtl_config_data_format()
585 val |= (mul_div / 128U - 2U); in sgtl_config_data_format()
/bsp/hpmicro/libraries/hpm_sdk/components/codec/sgtl5000/
A Dhpm_sgtl5000.c442 uint32_t mul_div = 0U; in sgtl_config_data_format() local
526 mul_div = mclk / sysFs; in sgtl_config_data_format()
528 if (sgtl_check_clock_tolerance(mul_div, 256)) { in sgtl_config_data_format()
529 mul_div = 256; in sgtl_config_data_format()
530 } else if (sgtl_check_clock_tolerance(mul_div, 384)) { in sgtl_config_data_format()
531 mul_div = 384; in sgtl_config_data_format()
532 } else if (sgtl_check_clock_tolerance(mul_div, 512)) { in sgtl_config_data_format()
533 mul_div = 512; in sgtl_config_data_format()
537 val |= (mul_div / 128U - 2U); in sgtl_config_data_format()

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