| /bsp/rockchip/common/rk_hal/lib/hal/src/ |
| A D | hal_pl330.c | 709 off += _LDST_MemToMem(dryRun, &buf[off], cyc); in _Bursts()
762 off = 0; in _Loop()
772 off += _Bursts(dryRun, pl330, &buf[off], pxs, cyc); in _Loop()
774 off += in _Loop()
807 off += _Bursts(dryRun, pl330, &buf[off], pxs, cyc); in _Period()
808 off += in _Period()
843 off += PL330_Instr_DMASEV(dryRun, &buf[off], ev); in _Period()
856 off = 0; in _Loop_Cyclic()
880 off += in _Loop_Cyclic()
887 off += in _Loop_Cyclic()
[all …]
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| /bsp/wch/risc-v/Libraries/ch56x_drivers/ |
| A D | ch56x_sys.c | 96 void sys_slp_clk_off0(uint8_t bits, int off) in sys_slp_clk_off0() argument
103 if ((u8v & bits) != (off ? bits : 0)) in sys_slp_clk_off0()
105 u8v = off ? (u8v | bits) : (u8v & ~bits); in sys_slp_clk_off0()
121 void sys_slp_clk_off1(uint8_t bits, int off) in sys_slp_clk_off1() argument
128 if ((u8v & bits) != (off ? bits : 0)) in sys_slp_clk_off1()
130 u8v = off ? (u8v | bits) : (u8v & ~bits); in sys_slp_clk_off1()
150 int sys_clk_off_by_irqn(uint8_t irqn, int off) in sys_clk_off_by_irqn() argument
179 if ((u8v & bitpos) != (off ? bitpos : 0)) in sys_clk_off_by_irqn()
181 u8v = off ? (u8v | bitpos) : (u8v & ~bitpos); in sys_clk_off_by_irqn()
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| A D | ch56x_sys.h | 388 int sys_clk_off_by_irqn(uint8_t irqn, int off);
389 void sys_slp_clk_off0(uint8_t bits, int off);
390 void sys_slp_clk_off1(uint8_t bits, int off);
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| /bsp/core-v-mcu/Libraries/core_v_hal_libraries/bmsis/core-v-mcu/include/ |
| A D | pmsis_gcc.h | 402 #define __BIT_EXTRACT(src, size, off) __builtin_pulp_bextract(src, size, off) argument
403 #define __BIT_EXTRACTU(src, size, off) __builtin_pulp_bextractu(src, size, off) argument
405 #define __BIT_EXTRACT_R(src, size, off) __builtin_pulp_bextract_r(src, __ExtInsMaskFast(si… argument
406 #define __BIT_EXTRACTU_R(src, size, off) __builtin_pulp_bextractu_r(src, __ExtInsMaskFast(si… argument
408 #define __BIT_EXTRACT_R_SAFE(src, size, off) __builtin_pulp_bextract_r(src, __ExtInsMaskSafe(si… argument
409 #define __BIT_EXTRACTU_R_SAFE(src, size, off) __builtin_pulp_bextractu_r(src, __ExtInsMaskSafe(si… argument
412 … __BIT_INSERT(dst, src, size, off) __builtin_pulp_binsert(dst, ~(((1<<size)-1)<<off), src, … argument
413 #define __BIT_INSERT_R(dst, src, size, off) __builtin_pulp_binsert_r(dst, src, __ExtInsMaskFas… argument
414 …define __BIT_INSERT_R_SAFE(dst, src, size, off) __builtin_pulp_binsert_r(dst, src, __ExtInsMaskSaf… argument
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| /bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/de/lowlevel_v2x/ |
| A D | de_smbl.c | 270 regwrite((void *)smbl_ctrl_block[sel].off, in de_smbl_update_regs()
276 reg_val = readl((void *)(smbl_enable_block[sel].off)); in de_smbl_update_regs()
279 writel(reg_val, (void *)(smbl_enable_block[sel].off)); in de_smbl_update_regs()
317 smbl_enable_block[sel].off = base; in de_smbl_init()
322 smbl_ctrl_block[sel].off = base + 0x4; in de_smbl_init()
327 smbl_hist_block[sel].off = base + 0x60; in de_smbl_init()
332 smbl_csc_block[sel].off = base + 0xc0; in de_smbl_init()
337 smbl_filter_block[sel].off = base + 0xf0; in de_smbl_init()
342 smbl_lut_block[sel].off = base + 0x200; in de_smbl_init()
482 regwrite((void *)smbl_csc_block[sel].off, in de_smbl_set_para()
[all …]
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| A D | de_dcsc.c | 134 readl((void *)dcsc_enable_block[sel].off); in de_dcsc_update_regs()
139 (void *)dcsc_enable_block[sel].off); in de_dcsc_update_regs()
141 regwrite((void *)dcsc_enable_block[sel].off, in de_dcsc_update_regs()
149 regwrite((void *)dcsc_coeff_block[sel].off, in de_dcsc_update_regs()
188 dcsc_enable_block[screen_id].off = base; in de_dcsc_init()
193 dcsc_coeff_block[screen_id].off = base + 0x80; in de_dcsc_init()
207 dcsc_enable_block[screen_id].off = base; in de_dcsc_init()
212 dcsc_coeff_block[screen_id].off = base + 0x10; in de_dcsc_init()
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| A D | de_vsu.c | 45 regwrite((void *)vsu_glb_block[sel][i].off, in de_vsu_update_regs()
51 regwrite((void *)vsu_out_block[sel][i].off, in de_vsu_update_regs()
57 regwrite((void *)vsu_yscale_block[sel][i].off, in de_vsu_update_regs()
63 regwrite((void *)vsu_cscale_block[sel][i].off, in de_vsu_update_regs()
75 regwrite((void *)vsu_yvcoeff_block[sel][i].off, in de_vsu_update_regs()
118 vsu_glb_block[sel][j].off = vsu_base; in de_vsu_init()
123 vsu_out_block[sel][j].off = vsu_base + 0x40; in de_vsu_init()
128 vsu_yscale_block[sel][j].off = vsu_base + 0x80; in de_vsu_init()
133 vsu_cscale_block[sel][j].off = vsu_base + 0xc0; in de_vsu_init()
146 vsu_yvcoeff_block[sel][j].off = vsu_base + 0x400; in de_vsu_init()
[all …]
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| A D | de_rtmx.c | 269 glb_ctl_block[sel].off = glb_base; in de_rtmx_init()
295 vi_attr_block[sel][j][i].off = in de_rtmx_init()
302 vi_fc_block[sel][j].off = in de_rtmx_init()
308 vi_haddr_block[sel][j].off = in de_rtmx_init()
314 vi_size_block[sel][j].off = in de_rtmx_init()
355 ui_haddr_block[sel][j].off = in de_rtmx_init()
361 ui_size_block[sel][j].off = in de_rtmx_init()
412 bld_attr_block[sel].off = apb_base; in de_rtmx_init()
2182 (void *)bld_ctl_block[sel].off, in de_rtmx_sync_hw()
2186 (void *)bld_ck_block[sel].off, in de_rtmx_sync_hw()
[all …]
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| A D | de_gsu.c | 67 gsu_glb_block[sel][j].off = gsu_base; in de_gsu_init()
72 gsu_out_block[sel][j].off = gsu_base + 0x40; in de_gsu_init()
77 gsu_scale_block[sel][j].off = gsu_base + 0x80; in de_gsu_init()
82 gsu_coeff_block[sel][j].off = gsu_base + 0x200; in de_gsu_init()
117 regwrite((void *)gsu_glb_block[sel][i].off, in de_gsu_update_regs()
123 regwrite((void *)gsu_out_block[sel][i].off, in de_gsu_update_regs()
129 regwrite((void *)gsu_scale_block[sel][i].off, in de_gsu_update_regs()
135 regwrite((void *)gsu_coeff_block[sel][i].off, in de_gsu_update_regs()
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| A D | de_peak.c | 53 regwrite((void *)peak_block[sel][chno].off, in de_peak_update_regs()
59 regwrite((void *)peak_gain_block[sel][chno].off, in de_peak_update_regs()
88 peak_block[sel][chno].off = base; in de_peak_init()
93 peak_gain_block[sel][chno].off = base + 0x10; in de_peak_init()
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| A D | de_bws.c | 61 regwrite((void *)bws_block[sel][chno].off, in de_bws_update_regs()
72 regwrite((void *)bws_block[sel][chno].off, in de_bws_update_regs()
78 regwrite((void *)bws_para_block[sel][chno].off, in de_bws_update_regs()
110 bws_block[sel][chno].off = base; in de_bws_init()
115 bws_para_block[sel][chno].off = base + 0x20; in de_bws_init()
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| A D | de_ase.c | 49 regwrite((void *)ase_block[sel][chno].off, in de_ase_update_regs()
77 ase_block[sel][chno].off = base; in de_ase_init()
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| A D | de_fcc.c | 67 fcc_para_block[sel][chno].off = fcc_base; in de_fcc_init()
87 regwrite((void *)fcc_para_block[sel][chno].off, in de_fcc_update_regs()
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| /bsp/ESP32_C3/ |
| A D | esp32c3.gpb | 4 set remote kill-packet off
5 set remote symbol-lookup-packet off
6 set remote verbose-resume-packet off
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| /bsp/x86/drivers/include/ |
| A D | i386.h | 106 #define SETGATE(gate, istrap, sel, off, dpl) \ argument
108 (gate).gd_off_15_0 = (rt_uint32_t)(off)&0xffff; \
116 (gate).gd_off_31_16 = (rt_uint32_t)(off) >> 16; \
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| /bsp/cvitek/drivers/libraries/spi/ |
| A D | dw_spi.h | 163 static void dw_writel(struct dw_spi *dws, uint32_t off, uint32_t val) in dw_writel() argument
165 writel(val, (dws->regs + off)); in dw_writel()
168 static uint32_t dw_readl(struct dw_spi *dws, uint32_t off) in dw_readl() argument
170 return readl(dws->regs + off); in dw_readl()
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| /bsp/qemu-virt64-riscv/ |
| A D | qemu-nographic.bat | 1 @echo off
9 -device virtio-serial-device -chardev socket,host=127.0.0.1,port=4321,server=on,wait=off,telnet=on,…
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| /bsp/qemu-virt64-aarch64/ |
| A D | qemu.bat | 1 @echo off
9 -device virtio-serial-device -chardev socket,host=127.0.0.1,port=4321,server=on,wait=off,telnet=on,…
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| A D | qemu-debug.bat | 1 @echo off
9 -device virtio-serial-device -chardev socket,host=127.0.0.1,port=4321,server=on,wait=off,telnet=on,…
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| A D | qemu-graphic.bat | 1 @echo off
13 -device virtio-serial-device -chardev socket,host=127.0.0.1,port=4321,server=on,wait=off,telnet=on,…
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| /bsp/rockchip/rk3500/driver/uart8250/ |
| A D | fiq-debugger.c | 44 rt_inline void rockchip_fiq_write(struct rockchip_fiq_debugger *t, rt_uint32_t val, int off) in rockchip_fiq_write() argument
46 HWREG32(t->debug_port_base + off * 4) = val; in rockchip_fiq_write()
49 rt_inline rt_uint32_t rockchip_fiq_read(struct rockchip_fiq_debugger *t, int off) in rockchip_fiq_read() argument
51 return HWREG32(t->debug_port_base + off * 4); in rockchip_fiq_read()
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| /bsp/dm365/platform/ |
| A D | findbit.S | 49 movs r3, r3, lsr ip @ shift off unused bits
91 movs r3, r3, lsr ip @ shift off unused bits
127 movs r3, r3, lsr ip @ shift off unused bits
160 movs r3, r3, lsr ip @ shift off unused bits
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| /bsp/nios_ii/ |
| A D | get_update_finsh.bat | 1 @echo off
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| /bsp/qemu-vexpress-a9/ |
| A D | qemu-nographic.bat | 1 @echo off
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| /bsp/raspberry-pi/raspi3-64/ |
| A D | qemu-64.bat | 1 @echo off
|