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Searched refs:op_size (Results 1 – 25 of 52) sorted by relevance

123

/bsp/synwit/libraries/SWM341_CSL/CMSIS/CoreSupport/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/airm2m/air32f103/libraries/CMSIS/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/rockchip/common/rk_hal/lib/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/tae32f5300/Libraries/CMSIS/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra8m1-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra6m4-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra8d1-vision-board/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra6m4-iot/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra6m3-hmi-board/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra4m2-eco/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ebf_qi_min_6m5/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra2l1-cpk/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra6m3-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra8d1-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/CMSIS/Core/Include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
332 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
340 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
341 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra6e2-fpb/ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/
A Darmv7m_cachel1.h117 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
125 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
126 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
360 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
368 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
369 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
390 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
398 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
399 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
428 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/renesas/ra4e2-eco/ra/arm/CMSIS_6/CMSIS/Core/Include/m-profile/
A Darmv7m_cachel1.h118 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
126 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
127 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
393 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
401 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
402 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
432 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/at32/libraries/CMSIS/include/
A Dcachel1_armv7.h119 int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U)); in SCB_InvalidateICache_by_Addr() local
127 op_size -= __SCB_ICACHE_LINE_SIZE; in SCB_InvalidateICache_by_Addr()
128 } while ( op_size > 0 ); in SCB_InvalidateICache_by_Addr()
362 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_InvalidateDCache_by_Addr() local
370 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_InvalidateDCache_by_Addr()
371 } while ( op_size > 0 ); in SCB_InvalidateDCache_by_Addr()
392 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); in SCB_CleanDCache_by_Addr() local
400 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanDCache_by_Addr()
401 } while ( op_size > 0 ); in SCB_CleanDCache_by_Addr()
430 op_size -= __SCB_DCACHE_LINE_SIZE; in SCB_CleanInvalidateDCache_by_Addr()
[all …]
/bsp/xuantie/libraries/xuantie_libraries/csi/csi2/include/core/
A Dcore_rv64.h1444 while (op_size > 0) { in csi_dcache_invalid_range()
1447 op_size -= linesize; in csi_dcache_invalid_range()
1454 while (op_size > 0) { in csi_dcache_invalid_range()
1460 while (op_size > 0) { in csi_dcache_invalid_range()
1490 while (op_size > 0) { in csi_dcache_clean_range()
1493 op_size -= linesize; in csi_dcache_clean_range()
1500 while (op_size > 0) { in csi_dcache_clean_range()
1506 while (op_size > 0) { in csi_dcache_clean_range()
1535 while (op_size > 0) { in csi_dcache_clean_invalid_range()
1538 op_size -= linesize; in csi_dcache_clean_invalid_range()
[all …]
A Dcore_rv32.h1157 long op_size = dsize + (unsigned long)addr % linesize; in csi_dcache_invalid_range() local
1162 while (op_size > 0) { in csi_dcache_invalid_range()
1165 op_size -= linesize; in csi_dcache_invalid_range()
1184 long op_size = dsize + (unsigned long)addr % linesize; in csi_dcache_clean_range() local
1189 while (op_size > 0) { in csi_dcache_clean_range()
1192 op_size -= linesize; in csi_dcache_clean_range()
1211 long op_size = dsize + (unsigned long)addr % linesize; in csi_dcache_clean_invalid_range() local
1216 while (op_size > 0) { in csi_dcache_clean_invalid_range()
1219 op_size -= linesize; in csi_dcache_clean_invalid_range()
/bsp/essemi/es32vf2264/libraries/RV_CORE/Include/
A Dcore_rv32.h1019 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_invalid_range() local
1025 while (op_size > 0) { in csi_dcache_invalid_range()
1028 op_size -= linesize; in csi_dcache_invalid_range()
1047 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_clean_range() local
1053 while (op_size > 0) { in csi_dcache_clean_range()
1056 op_size -= linesize; in csi_dcache_clean_range()
1075 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_clean_invalid_range() local
1081 while (op_size > 0) { in csi_dcache_clean_invalid_range()
1084 op_size -= linesize; in csi_dcache_clean_invalid_range()
/bsp/bouffalo_lab/libraries/bl_mcu_sdk/drivers/lhal/include/arch/risc-v/t-head/Core/Include/
A Dcore_rv64.h993 int64_t op_size = dsize + (uint64_t)addr % 64; in csi_dcache_invalid_range() local
999 while (op_size > 0) { in csi_dcache_invalid_range()
1002 op_size -= linesize; in csi_dcache_invalid_range()
1018 int64_t op_size = dsize + (uint64_t)addr % 64; in csi_dcache_clean_range() local
1024 while (op_size > 0) { in csi_dcache_clean_range()
1027 op_size -= linesize; in csi_dcache_clean_range()
1043 int64_t op_size = dsize + (uint64_t)addr % 64; in csi_dcache_clean_invalid_range() local
1049 while (op_size > 0) { in csi_dcache_clean_invalid_range()
1052 op_size -= linesize; in csi_dcache_clean_invalid_range()
A Dcore_rv32.h1204 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_invalid_range() local
1210 while (op_size > 0) { in csi_dcache_invalid_range()
1213 op_size -= linesize; in csi_dcache_invalid_range()
1229 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_clean_range() local
1235 while (op_size > 0) { in csi_dcache_clean_range()
1238 op_size -= linesize; in csi_dcache_clean_range()
1254 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_clean_invalid_range() local
1260 while (op_size > 0) { in csi_dcache_clean_invalid_range()
1263 op_size -= linesize; in csi_dcache_clean_invalid_range()
/bsp/thead-smart/drivers/
A Dcore_rv32.h1120 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_invalid_range() local
1126 while (op_size > 0) { in csi_dcache_invalid_range()
1129 op_size -= linesize; in csi_dcache_invalid_range()
1148 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_clean_range() local
1154 while (op_size > 0) { in csi_dcache_clean_range()
1157 op_size -= linesize; in csi_dcache_clean_range()
1176 int32_t op_size = dsize + (uint32_t)addr % 32; in csi_dcache_clean_invalid_range() local
1182 while (op_size > 0) { in csi_dcache_clean_invalid_range()
1185 op_size -= linesize; in csi_dcache_clean_invalid_range()

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