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/bsp/ti/c28x/libraries/tms320f28379d/headers/cmd/
A DF2837xD_Headers_BIOS_cpu1.cmd8 ADCA_RESULT : origin = 0x000B00, length = 0x000020
9 ADCB_RESULT : origin = 0x000B20, length = 0x000020
10 ADCC_RESULT : origin = 0x000B40, length = 0x000020
11 ADCD_RESULT : origin = 0x000B60, length = 0x000020
13 ADCA : origin = 0x007400, length = 0x000080
14 ADCB : origin = 0x007480, length = 0x000080
15 ADCC : origin = 0x007500, length = 0x000080
16 ADCD : origin = 0x007580, length = 0x000080
18 ANALOG_SUBSYS : origin = 0x05D180, length = 0x000080
20 CANA : origin = 0x048000, length = 0x000800
[all …]
A DF2837xD_Headers_nonBIOS_cpu1.cmd8 ADCA_RESULT : origin = 0x000B00, length = 0x000020
9 ADCB_RESULT : origin = 0x000B20, length = 0x000020
10 ADCC_RESULT : origin = 0x000B40, length = 0x000020
11 ADCD_RESULT : origin = 0x000B60, length = 0x000020
13 ADCA : origin = 0x007400, length = 0x000080
14 ADCB : origin = 0x007480, length = 0x000080
15 ADCC : origin = 0x007500, length = 0x000080
16 ADCD : origin = 0x007580, length = 0x000080
18 ANALOG_SUBSYS : origin = 0x05D180, length = 0x000080
20 CANA : origin = 0x048000, length = 0x000800
[all …]
A DF2837xD_Headers_nonBIOS_cpu2.cmd8 ADCA_RESULT : origin = 0x000B00, length = 0x000020
9 ADCB_RESULT : origin = 0x000B20, length = 0x000020
10 ADCC_RESULT : origin = 0x000B40, length = 0x000020
11 ADCD_RESULT : origin = 0x000B60, length = 0x000020
13 ADCA : origin = 0x007400, length = 0x000080
14 ADCB : origin = 0x007480, length = 0x000080
15 ADCC : origin = 0x007500, length = 0x000080
16 ADCD : origin = 0x007580, length = 0x000080
18 CANA : origin = 0x048000, length = 0x000800
23 CMPSS1 : origin = 0x005C80, length = 0x000020
[all …]
A DF2837xD_Headers_BIOS_cpu2.cmd8 ADCA_RESULT : origin = 0x000B00, length = 0x000020
9 ADCB_RESULT : origin = 0x000B20, length = 0x000020
10 ADCC_RESULT : origin = 0x000B40, length = 0x000020
11 ADCD_RESULT : origin = 0x000B60, length = 0x000020
13 ADCA : origin = 0x007400, length = 0x000080
14 ADCB : origin = 0x007480, length = 0x000080
15 ADCC : origin = 0x007500, length = 0x000080
16 ADCD : origin = 0x007580, length = 0x000080
18 CANA : origin = 0x048000, length = 0x000800
23 CMPSS1 : origin = 0x005C80, length = 0x000020
[all …]
/bsp/ti/c28x/tms320f28379d/cmd/
A D2837x_FLASH_lnk_cpu1.cmd8 BEGIN : origin = 0x080000, length = 0x000002
9 RESET : origin = 0x3FFFC0, length = 0x000002
10 RAMGS8_15 : origin = 0x013000, length = 0x009000
13 FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
14 FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
15 FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
16 FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
17 FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
31 RAMM0 : origin = 0x000122, length = 0x0002DE
34 CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
[all …]
A D2837x_RAM_lnk_cpu1.cmd8 BEGIN : origin = 0x000000, length = 0x000002
9 RAMM0 : origin = 0x000122, length = 0x0002DE
10 RESET : origin = 0x3FFFC0, length = 0x000002
11 RAMGS8_15 : origin = 0x013000, length = 0x009000
14 RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
15 …BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this fo…
16 EBSS : origin = 0x008000, length = 0x007000 /* RAMLS0-4, 5*0x0800 */
17 ECONST : origin = 0x00F000, length = 0x004000 /* RAMGS0-2, 3*0x1000 */
18 CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
19 CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
/bsp/rm48x50/HALCoGen/source/
A Dsys_link.cmd26 VECTORS (X) : origin=0x00000000 length=0x00000020
27 FLASH0 (RX) : origin=0x00000020 length=0x0017FFE0
28 FLASH1 (RX) : origin=0x00180000 length=0x00180000
29 STACKS (RW) : origin=0x08000000 length=0x00001500
30 RAM (RW) : origin=0x08001500 length=0x0003eaff
/bsp/ti/c28x/libraries/tms320f28379d/common/include/
A DF2837xD_sci_io.h57 extern off_t SCI_lseek(int dev_fd, off_t offset, int origin);
/bsp/ti/c28x/libraries/tms320f28379d/common/source/
A DF2837xD_sci_io.c162 off_t SCI_lseek(int dev_fd, off_t offset, int origin) in SCI_lseek() argument
/bsp/simulator/SDL2/
A DCOPYING.txt13 1. The origin of this software must not be misrepresented; you must not
/bsp/nxp/imx/imxrt/imxrt1170-nxp-evk/board/
A Ddisplay_support.c25 #define DEMO_MIPI_DPHY_BIT_CLK_ENLARGE(origin) (((origin) / 8) * 9) argument
/bsp/allwinner_tina/
A DREADME.md42 git checkout -b f1c100s origin/f1c100s
/bsp/hifive1/freedom-e-sdk/
A DREADME.md71 git pull origin master
/bsp/sparkfun-redv/freedom-e-sdk/
A DREADME.md71 git pull origin master
/bsp/k230/
A DREADME.md232 Your branch is up to date with 'origin/for-k230'.
/bsp/renesas/ra8d1-ek/script/
A Dfsp.ld281 ASSERT(ORIGIN(ITCM) % 8 == 0, "ITCM memory region origin must be aligned to 8 bytes.")
444 ASSERT(ORIGIN(DTCM) % 8 == 0, "DTCM memory region origin must be aligned to 8 bytes.")
/bsp/renesas/ra8m1-ek/script/
A Dfsp.ld279 ASSERT(ORIGIN(ITCM) % 8 == 0, "ITCM memory region origin must be aligned to 8 bytes.")
438 ASSERT(ORIGIN(DTCM) % 8 == 0, "DTCM memory region origin must be aligned to 8 bytes.")
/bsp/renesas/ra8d1-vision-board/script/
A Dfsp.ld281 ASSERT(ORIGIN(ITCM) % 8 == 0, "ITCM memory region origin must be aligned to 8 bytes.")
444 ASSERT(ORIGIN(DTCM) % 8 == 0, "DTCM memory region origin must be aligned to 8 bytes.")
/bsp/renesas/ra4e2-eco/script/
A Dfsp.ld281 ASSERT(ORIGIN(ITCM) % 8 == 0, "ITCM memory region origin must be aligned to 8 bytes.")
440 ASSERT(ORIGIN(DTCM) % 8 == 0, "DTCM memory region origin must be aligned to 8 bytes.")
/bsp/renesas/ra6e2-fpb/script/
A Dfsp.ld276 ASSERT(ORIGIN(ITCM) % 8 == 0, "ITCM memory region origin must be aligned to 8 bytes.")
435 ASSERT(ORIGIN(DTCM) % 8 == 0, "DTCM memory region origin must be aligned to 8 bytes.")
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/
A Dlinker.ld72 …* Uncomment the following line, define the region origin and length, and uncomment the placement of
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/
A Dlinker.ld72 …* Uncomment the following line, define the region origin and length, and uncomment the placement of
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/
A Dlinker.ld72 …* Uncomment the following line, define the region origin and length, and uncomment the placement of
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/
A DLICENSE130 reasonable and customary use in describing the origin of the Work and
/bsp/Infineon/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/
A DLICENSE130 reasonable and customary use in describing the origin of the Work and

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