Searched refs:pCtrl (Results 1 – 3 of 3) sorted by relevance
40 if (!pCtrl->IsReady) in FSpi_ReadWriteByte()58 while (FSPI_RX_FIFO_EMPTY(pCtrl)) in FSpi_ReadWriteByte()67 RxData = FSPI_READ_DATA(pCtrl); in FSpi_ReadWriteByte()82 FSPI_DISABLE(pCtrl); in FSpi_Init()120 FSPI_SET_BAUDR(pCtrl, pCtrl->Config.BaudRDiv); in FSpi_Init()123 SPI_TXFTL_REG(pCtrl)->val.Tft = 0; in FSpi_Init()130 FSPI_ENABLE(pCtrl); in FSpi_Init()135 pCtrl->IsReady = TRUE; in FSpi_Init()163 FSPI_DISABLE(pCtrl); in FSpi_SelectSlave()165 pSelReg = SPI_SE_REG(pCtrl); in FSpi_SelectSlave()[all …]
294 #define SPI_CTL_ID(pCtrl) ((pCtrl)->CtrlId) argument295 #define SPI_BASE_ADDR(pCtrl) (g_SpiBaseAddr[SPI_CTL_ID(pCtrl)]) argument298 #define SPI_SE_REG(pCtrl) ((FSpi_SeReg_t *)(SPI_BASE_ADDR(pCtrl) + SPI_SE_R)) argument301 #define FSPI_SET_BAUDR(pCtrl, div) (SPI_BAUDR_REG(pCtrl)->val.Sckdv = (div)) argument302 #define FSPI_GET_BAUDR(pCtrl) (SPI_BAUDR_REG(pCtrl)->val.Sckdv) argument309 #define FSPI_ENABLE(pCtrl) (SPI_SSIEN_REG(pCtrl)->val.SsiEn = 1) argument310 #define FSPI_DISABLE(pCtrl) (SPI_SSIEN_REG(pCtrl)->val.SsiEn = 0) argument318 #define SPI_ID_REG(pCtrl) ((FSpi_IDReg_t *)(SPI_BASE_ADDR(pCtrl) + SPI_ID_R)) argument319 #define FSPI_GET_ID(pCtrl) (SPI_ID_REG(pCtrl)->IdCode) argument321 #define FSPI_READ_DATA(pCtrl) (u16)(SPI_DATA_REG(pCtrl)->val.Dr) argument[all …]
60 #define FSPI_DEV_ADDR_LEN(pCtrl) (pCtrl->Config.DevAddrLen) argument61 #define FSPI_IS_3_BYTE_ADDR(pCtrl) (SPI_3_BYTE_ADDR == FSPI_DEV_ADDR_LEN(pCtrl)) argument62 #define FSPI_DEV_ADDR(pCtrl) (pCtrl->Config.DevAddr) argument86 u32 FSpi_Init(FT_INOUT FSpi_Ctrl_t *pCtrl);87 u32 FSpi_ReadWriteByte(FT_INOUT FSpi_Ctrl_t *pCtrl, FT_IN u8 TxData,89 void FSpi_SelectSlave(FT_INOUT FSpi_Ctrl_t *pCtrl, FT_IN FSpi_DevId_t DevId,
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